mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-07-27 13:29:50 +00:00
[msan] Handle X86 *.psad.* and *.pmadd.* intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211156 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evgeniy Stepanov
parent
5393254646
commit
fc72762a0f
@ -2060,6 +2060,40 @@ struct MemorySanitizerVisitor : public InstVisitor<MemorySanitizerVisitor> {
|
||||
setOriginForNaryOp(I);
|
||||
}
|
||||
|
||||
// \brief Instrument sum-of-absolute-differencies intrinsic.
|
||||
void handleVectorSadIntrinsic(IntrinsicInst &I) {
|
||||
const unsigned SignificantBitsPerResultElement = 16;
|
||||
bool isX86_MMX = I.getOperand(0)->getType()->isX86_MMXTy();
|
||||
Type *ResTy = isX86_MMX ? IntegerType::get(*MS.C, 64) : I.getType();
|
||||
unsigned ZeroBitsPerResultElement =
|
||||
ResTy->getScalarSizeInBits() - SignificantBitsPerResultElement;
|
||||
|
||||
IRBuilder<> IRB(&I);
|
||||
Value *S = IRB.CreateOr(getShadow(&I, 0), getShadow(&I, 1));
|
||||
S = IRB.CreateBitCast(S, ResTy);
|
||||
S = IRB.CreateSExt(IRB.CreateICmpNE(S, Constant::getNullValue(ResTy)),
|
||||
ResTy);
|
||||
S = IRB.CreateLShr(S, ZeroBitsPerResultElement);
|
||||
S = IRB.CreateBitCast(S, getShadowTy(&I));
|
||||
setShadow(&I, S);
|
||||
setOriginForNaryOp(I);
|
||||
}
|
||||
|
||||
// \brief Instrument multiply-add intrinsic.
|
||||
void handleVectorPmaddIntrinsic(IntrinsicInst &I,
|
||||
unsigned EltSizeInBits = 0) {
|
||||
bool isX86_MMX = I.getOperand(0)->getType()->isX86_MMXTy();
|
||||
Type *ResTy = isX86_MMX ? getMMXVectorTy(EltSizeInBits * 2) : I.getType();
|
||||
IRBuilder<> IRB(&I);
|
||||
Value *S = IRB.CreateOr(getShadow(&I, 0), getShadow(&I, 1));
|
||||
S = IRB.CreateBitCast(S, ResTy);
|
||||
S = IRB.CreateSExt(IRB.CreateICmpNE(S, Constant::getNullValue(ResTy)),
|
||||
ResTy);
|
||||
S = IRB.CreateBitCast(S, getShadowTy(&I));
|
||||
setShadow(&I, S);
|
||||
setOriginForNaryOp(I);
|
||||
}
|
||||
|
||||
void visitIntrinsicInst(IntrinsicInst &I) {
|
||||
switch (I.getIntrinsicID()) {
|
||||
case llvm::Intrinsic::bswap:
|
||||
@ -2196,6 +2230,27 @@ struct MemorySanitizerVisitor : public InstVisitor<MemorySanitizerVisitor> {
|
||||
handleVectorPackIntrinsic(I, 32);
|
||||
break;
|
||||
|
||||
case llvm::Intrinsic::x86_mmx_psad_bw:
|
||||
case llvm::Intrinsic::x86_sse2_psad_bw:
|
||||
case llvm::Intrinsic::x86_avx2_psad_bw:
|
||||
handleVectorSadIntrinsic(I);
|
||||
break;
|
||||
|
||||
case llvm::Intrinsic::x86_sse2_pmadd_wd:
|
||||
case llvm::Intrinsic::x86_avx2_pmadd_wd:
|
||||
case llvm::Intrinsic::x86_ssse3_pmadd_ub_sw_128:
|
||||
case llvm::Intrinsic::x86_avx2_pmadd_ub_sw:
|
||||
handleVectorPmaddIntrinsic(I);
|
||||
break;
|
||||
|
||||
case llvm::Intrinsic::x86_ssse3_pmadd_ub_sw:
|
||||
handleVectorPmaddIntrinsic(I, 8);
|
||||
break;
|
||||
|
||||
case llvm::Intrinsic::x86_mmx_pmadd_wd:
|
||||
handleVectorPmaddIntrinsic(I, 16);
|
||||
break;
|
||||
|
||||
default:
|
||||
if (!handleUnknownIntrinsic(I))
|
||||
visitInstruction(I);
|
||||
|
||||
65
test/Instrumentation/MemorySanitizer/vector_arith.ll
Normal file
65
test/Instrumentation/MemorySanitizer/vector_arith.ll
Normal file
@ -0,0 +1,65 @@
|
||||
; RUN: opt < %s -msan -msan-check-access-address=0 -S | FileCheck %s
|
||||
|
||||
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
|
||||
target triple = "x86_64-unknown-linux-gnu"
|
||||
|
||||
declare <4 x i32> @llvm.x86.sse2.pmadd.wd(<8 x i16>, <8 x i16>) nounwind readnone
|
||||
declare x86_mmx @llvm.x86.ssse3.pmadd.ub.sw(x86_mmx, x86_mmx) nounwind readnone
|
||||
declare <2 x i64> @llvm.x86.sse2.psad.bw(<16 x i8>, <16 x i8>) nounwind readnone
|
||||
declare x86_mmx @llvm.x86.mmx.psad.bw(x86_mmx, x86_mmx) nounwind readnone
|
||||
|
||||
define <4 x i32> @Test_sse2_pmadd_wd(<8 x i16> %a, <8 x i16> %b) sanitize_memory {
|
||||
entry:
|
||||
%c = tail call <4 x i32> @llvm.x86.sse2.pmadd.wd(<8 x i16> %a, <8 x i16> %b) nounwind
|
||||
ret <4 x i32> %c
|
||||
}
|
||||
|
||||
; CHECK-LABEL: @Test_sse2_pmadd_wd(
|
||||
; CHECK: or <8 x i16>
|
||||
; CHECK: bitcast <8 x i16> {{.*}} to <4 x i32>
|
||||
; CHECK: icmp ne <4 x i32> {{.*}}, zeroinitializer
|
||||
; CHECK: sext <4 x i1> {{.*}} to <4 x i32>
|
||||
; CHECK: ret <4 x i32>
|
||||
|
||||
|
||||
define x86_mmx @Test_ssse3_pmadd_ub_sw(x86_mmx %a, x86_mmx %b) sanitize_memory {
|
||||
entry:
|
||||
%c = tail call x86_mmx @llvm.x86.ssse3.pmadd.ub.sw(x86_mmx %a, x86_mmx %b) nounwind
|
||||
ret x86_mmx %c
|
||||
}
|
||||
|
||||
; CHECK-LABEL: @Test_ssse3_pmadd_ub_sw(
|
||||
; CHECK: or i64
|
||||
; CHECK: bitcast i64 {{.*}} to <4 x i16>
|
||||
; CHECK: icmp ne <4 x i16> {{.*}}, zeroinitializer
|
||||
; CHECK: sext <4 x i1> {{.*}} to <4 x i16>
|
||||
; CHECK: bitcast <4 x i16> {{.*}} to i64
|
||||
; CHECK: ret x86_mmx
|
||||
|
||||
|
||||
define <2 x i64> @Test_x86_sse2_psad_bw(<16 x i8> %a, <16 x i8> %b) sanitize_memory {
|
||||
%c = tail call <2 x i64> @llvm.x86.sse2.psad.bw(<16 x i8> %a, <16 x i8> %b)
|
||||
ret <2 x i64> %c
|
||||
}
|
||||
|
||||
; CHECK-LABEL: @Test_x86_sse2_psad_bw(
|
||||
; CHECK: or <16 x i8> {{.*}}, {{.*}}
|
||||
; CHECK: bitcast <16 x i8> {{.*}} to <2 x i64>
|
||||
; CHECK: icmp ne <2 x i64> {{.*}}, zeroinitializer
|
||||
; CHECK: sext <2 x i1> {{.*}} to <2 x i64>
|
||||
; CHECK: lshr <2 x i64> {{.*}}, <i64 48, i64 48>
|
||||
; CHECK: ret <2 x i64>
|
||||
|
||||
|
||||
define x86_mmx @Test_x86_mmx_psad_bw(x86_mmx %a, x86_mmx %b) sanitize_memory {
|
||||
entry:
|
||||
%c = tail call x86_mmx @llvm.x86.mmx.psad.bw(x86_mmx %a, x86_mmx %b) nounwind
|
||||
ret x86_mmx %c
|
||||
}
|
||||
|
||||
; CHECK-LABEL: @Test_x86_mmx_psad_bw(
|
||||
; CHECK: or i64
|
||||
; CHECK: icmp ne i64
|
||||
; CHECK: sext i1 {{.*}} to i64
|
||||
; CHECK: lshr i64 {{.*}}, 48
|
||||
; CHECK: ret x86_mmx
|
||||
Loading…
Reference in New Issue
Block a user