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Remove the "-promote-elements" flag. This flag is now enabled by default.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157925 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Nadav Rotem 2012-06-04 11:27:21 +00:00
parent d01d693c0b
commit fcb2c3cf5e
17 changed files with 25 additions and 44 deletions
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12
include/llvm/Target/TargetLowering.h
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@ -1720,13 +1720,6 @@ private:
const TargetData *TD;
const TargetLoweringObjectFile &TLOF;
/// We are in the process of implementing a new TypeLegalization action
/// which is the promotion of vector elements. This feature is under
/// development. Until this feature is complete, it is only enabled using a
/// flag. We pass this flag using a member because of circular dep issues.
/// This member will be removed with the flag once we complete the transition.
bool mayPromoteElements;
/// PointerTy - The type to use for pointers, usually i32 or i64.
///
MVT PointerTy;
@ -1930,9 +1923,8 @@ private:
if (NumElts == 1)
return LegalizeKind(TypeScalarizeVector, EltVT);
// If we allow the promotion of vector elements using a flag,
// then try to widen vector elements until a legal type is found.
if (mayPromoteElements && EltVT.isInteger()) {
// Try to widen vector elements until a legal type is found.
if (EltVT.isInteger()) {
// Vectors with a number of elements that is not a power of two are always
// widened, for example <3 x float> -> <4 x float>.
if (!VT.isPow2VectorType()) {

13
lib/CodeGen/SelectionDAG/TargetLowering.cpp
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@ -33,13 +33,6 @@
#include <cctype>
using namespace llvm;
/// We are in the process of implementing a new TypeLegalization action
/// - the promotion of vector elements. This feature is disabled by default
/// and only enabled using this flag.
static cl::opt<bool>
AllowPromoteIntElem("promote-elements", cl::Hidden, cl::init(true),
cl::desc("Allow promotion of integer vector element types"));
/// InitLibcallNames - Set default libcall names.
///
static void InitLibcallNames(const char **Names) {
@ -522,8 +515,7 @@ static void InitCmpLibcallCCs(ISD::CondCode *CCs) {
/// NOTE: The constructor takes ownership of TLOF.
TargetLowering::TargetLowering(const TargetMachine &tm,
const TargetLoweringObjectFile *tlof)
: TM(tm), TD(TM.getTargetData()), TLOF(*tlof),
mayPromoteElements(AllowPromoteIntElem) {
: TM(tm), TD(TM.getTargetData()), TLOF(*tlof) {
// All operations default to being supported.
memset(OpActions, 0, sizeof(OpActions));
memset(LoadExtActions, 0, sizeof(LoadExtActions));
@ -829,11 +821,8 @@ void TargetLowering::computeRegisterProperties() {
unsigned NElts = VT.getVectorNumElements();
if (NElts != 1) {
bool IsLegalWiderType = false;
// If we allow the promotion of vector elements using a flag,
// then return TypePromoteInteger on vector elements.
// First try to promote the elements of integer vectors. If no legal
// promotion was found, fallback to the widen-vector method.
if (mayPromoteElements)
for (unsigned nVT = i+1; nVT <= MVT::LAST_VECTOR_VALUETYPE; ++nVT) {
EVT SVT = (MVT::SimpleValueType)nVT;
// Promote vectors of integers to vectors with the same number

2
test/CodeGen/ARM/opt-shuff-tstore.ll
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@ -1,4 +1,4 @@
; RUN: llc -mcpu=cortex-a9 -mtriple=arm-linux-unknown -promote-elements -mattr=+neon < %s | FileCheck %s
; RUN: llc -mcpu=cortex-a9 -mtriple=arm-linux-unknown -mattr=+neon < %s | FileCheck %s
; CHECK: func_4_8
; CHECK: vst1.32

2
test/CodeGen/X86/2011-09-18-sse2cmp.ll
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@ -1,4 +1,4 @@
;RUN: llc < %s -march=x86 -mcpu=yonah -promote-elements -mattr=+sse2,-sse41 | FileCheck %s
;RUN: llc < %s -march=x86 -mcpu=yonah -mattr=+sse2,-sse41 | FileCheck %s
;CHECK: @max
;CHECK: cmplepd

2
test/CodeGen/X86/2011-09-21-setcc-bug.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=x86-64 -mcpu=corei7 -promote-elements -mattr=+sse41
; RUN: llc < %s -march=x86-64 -mcpu=corei7 -mattr=+sse41
; Make sure we are not crashing on this code.

2
test/CodeGen/X86/2011-10-11-srl.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7-avx -promote-elements -mattr=-sse41
; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7-avx -mattr=-sse41
target triple = "x86_64-unknown-linux-gnu"

8
test/CodeGen/X86/4char-promote.ll
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@ -1,11 +1,11 @@
; A test for checking PR 9623
; RUN: llc -march=x86-64 -mcpu=corei7 -promote-elements < %s | FileCheck %s
; RUN: llc -march=x86-64 -mcpu=corei7 < %s | FileCheck %s
target triple = "x86_64-apple-darwin"
; CHECK: pmulld
; CHECK: paddd
; CHECK-NOT: movdqa
; CHECK: pmulld
; CHECK: paddd
; CHECK-NOT: movdqa
; CHECK: ret
define <4 x i8> @foo(<4 x i8> %x, <4 x i8> %y) {

2
test/CodeGen/X86/avx-blend.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7-avx -promote-elements -mattr=+avx | FileCheck %s
; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7-avx -mattr=+avx | FileCheck %s
; AVX128 tests:

2
test/CodeGen/X86/avx-minmax.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=x86-64 -mattr=+avx -asm-verbose=false -enable-unsafe-fp-math -enable-no-nans-fp-math -promote-elements | FileCheck -check-prefix=UNSAFE %s
; RUN: llc < %s -march=x86-64 -mattr=+avx -asm-verbose=false -enable-unsafe-fp-math -enable-no-nans-fp-math | FileCheck -check-prefix=UNSAFE %s
; UNSAFE: maxpd:
; UNSAFE: vmaxpd {{.+}}, %xmm

4
test/CodeGen/X86/basic-promote-integers.ll
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@ -1,7 +1,7 @@
; Test that vectors are scalarized/lowered correctly
; (with both legalization methods).
; RUN: llc -march=x86 -promote-elements < %s
; RUN: llc -march=x86 < %s
; RUN: llc -march=x86 < %s
; RUN: llc -march=x86 < %s
; A simple test to check copyToParts and copyFromParts.

2
test/CodeGen/X86/blend-msb.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7 -promote-elements -mattr=+sse41 | FileCheck %s
; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7 -mattr=+sse41 | FileCheck %s
; In this test we check that sign-extend of the mask bit is performed by

4
test/CodeGen/X86/mem-promote-integers.ll
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@ -1,8 +1,8 @@
; Test the basic functionality of integer element promotions of different types.
; This tests checks passing of arguments, loading and storing to memory and
; basic arithmetic.
; RUN: llc -march=x86 -promote-elements < %s
; RUN: llc -march=x86-64 -promote-elements < %s
; RUN: llc -march=x86 < %s
; RUN: llc -march=x86-64 < %s
define <1 x i8> @test_1xi8(<1 x i8> %x, <1 x i8>* %b) {
%bb = load <1 x i8>* %b

2
test/CodeGen/X86/opt-shuff-tstore.ll
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@ -1,4 +1,4 @@
; RUN: llc -mcpu=corei7 -mtriple=x86_64-linux < %s -promote-elements -mattr=+sse2,+sse41 | FileCheck %s
; RUN: llc -mcpu=corei7 -mtriple=x86_64-linux < %s -mattr=+sse2,+sse41 | FileCheck %s
; CHECK: func_4_8
; A single memory write

2
test/CodeGen/X86/promote-trunc.ll
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@ -1,4 +1,4 @@
; RUN: llc -promote-elements < %s -march=x86-64
; RUN: llc < %s -march=x86-64
define<4 x i8> @func_8_64() {
%F = load <4 x i64>* undef

6
test/CodeGen/X86/sse-minmax.ll
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@ -1,6 +1,6 @@
; RUN: llc < %s -march=x86-64 -mcpu=nehalem -asm-verbose=false -promote-elements | FileCheck %s
; RUN: llc < %s -march=x86-64 -mcpu=nehalem -asm-verbose=false -enable-unsafe-fp-math -enable-no-nans-fp-math -promote-elements | FileCheck -check-prefix=UNSAFE %s
; RUN: llc < %s -march=x86-64 -mcpu=nehalem -asm-verbose=false -enable-no-nans-fp-math -promote-elements | FileCheck -check-prefix=FINITE %s
; RUN: llc < %s -march=x86-64 -mcpu=nehalem -asm-verbose=false | FileCheck %s
; RUN: llc < %s -march=x86-64 -mcpu=nehalem -asm-verbose=false -enable-unsafe-fp-math -enable-no-nans-fp-math | FileCheck -check-prefix=UNSAFE %s
; RUN: llc < %s -march=x86-64 -mcpu=nehalem -asm-verbose=false -enable-no-nans-fp-math | FileCheck -check-prefix=FINITE %s
; Some of these patterns can be matched as SSE min or max. Some of
; then can be matched provided that the operands are swapped.

2
test/CodeGen/X86/sse41-blend.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7 -promote-elements -mattr=+sse41 | FileCheck %s
; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7 -mattr=+sse41 | FileCheck %s
;CHECK: vsel_float
;CHECK: blendvps

2
test/CodeGen/X86/trunc-ext-ld-st.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=x86-64 -mcpu=corei7 -promote-elements -mattr=+sse41 | FileCheck %s
; RUN: llc < %s -march=x86-64 -mcpu=corei7 -mattr=+sse41 | FileCheck %s
;CHECK: load_2_i8
; A single 16-bit load