[PowerPC] Convert a README.txt entry into a better test

We now produce the desired code as noted in the README.txt file (no spurious
or). Remove the README entry and improve the regression test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225214 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Hal Finkel 2015-01-05 21:53:52 +00:00
parent a45b58174f
commit fcfee17911
2 changed files with 7 additions and 14 deletions

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@ -494,19 +494,6 @@ _bar:
===-------------------------------------------------------------------------===
test/CodeGen/PowerPC/2007-03-24-cntlzd.ll compiles to:
__ZNK4llvm5APInt17countLeadingZerosEv:
ld r2, 0(r3)
cntlzd r2, r2
or r2, r2, r2 <<-- silly.
addi r3, r2, -64
blr
The dead or is a 'truncate' from 64- to 32-bits.
===-------------------------------------------------------------------------===
We generate horrible ppc code for this:
#define N 2000000

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@ -1,4 +1,4 @@
; RUN: llc < %s -march=ppc64 -mcpu=g5 | grep cntlzd
; RUN: llc < %s -march=ppc64 -mcpu=g5 | FileCheck %s
define i32 @_ZNK4llvm5APInt17countLeadingZerosEv(i64 *%t) nounwind {
%tmp19 = load i64* %t
@ -7,6 +7,12 @@ define i32 @_ZNK4llvm5APInt17countLeadingZerosEv(i64 *%t) nounwind {
%tmp89 = add i32 %tmp23, -64 ; <i32> [#uses=1]
%tmp90 = add i32 %tmp89, 0 ; <i32> [#uses=1]
ret i32 %tmp90
; CHECK-LABEL: @_ZNK4llvm5APInt17countLeadingZerosEv
; CHECK: ld [[REG1:[0-9]+]], 0(3)
; CHECK-NEXT: cntlzd [[REG2:[0-9]+]], [[REG1]]
; CHECK-NEXT: addi 3, [[REG2]], -64
; CHECK-NEXT: blr
}
declare i64 @llvm.ctlz.i64(i64, i1)