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Fix a thinko: When lowering fneg with xor, bitcast the operands
from floating-point to integer first, and bitcast the result back to floating-point. Previously, this test was passing by falling back to SelectionDAG lowering. The resulting code isn't as nice, but it's correct and CodeGen now stays on the fast path. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81171 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -615,12 +615,25 @@ FastISel::SelectFNeg(User *I) {
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unsigned OpReg = getRegForValue(BinaryOperator::getFNegArgument(I));
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if (OpReg == 0) return false;
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// Twiddle the sign bit with xor.
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// Bitcast the value to integer, twiddle the sign bit with xor,
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// and then bitcast it back to floating-point.
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EVT VT = TLI.getValueType(I->getType());
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if (VT.getSizeInBits() > 64) return false;
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unsigned ResultReg = FastEmit_ri_(VT.getSimpleVT(), ISD::XOR, OpReg,
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UINT64_C(1) << (VT.getSizeInBits()-1),
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VT.getSimpleVT());
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EVT IntVT = EVT::getIntegerVT(I->getContext(), VT.getSizeInBits());
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unsigned IntReg = FastEmit_r(VT.getSimpleVT(), IntVT.getSimpleVT(),
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ISD::BIT_CONVERT, OpReg);
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if (IntReg == 0)
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return false;
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unsigned IntResultReg = FastEmit_ri_(IntVT.getSimpleVT(), ISD::XOR, IntReg,
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UINT64_C(1) << (VT.getSizeInBits()-1),
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IntVT.getSimpleVT());
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if (IntResultReg == 0)
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return false;
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unsigned ResultReg = FastEmit_r(IntVT.getSimpleVT(), VT.getSimpleVT(),
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ISD::BIT_CONVERT, IntResultReg);
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if (ResultReg == 0)
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return false;
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@ -1,14 +1,14 @@
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; RUN: llvm-as < %s | llc -fast-isel -march=x86-64 | FileCheck %s
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; RUN: llvm-as < %s | llc -fast-isel -fast-isel-abort -march=x86-64 | FileCheck %s
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; CHECK: doo:
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; CHECK: xorpd
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; CHECK: xor
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define double @doo(double %x) nounwind {
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%y = fsub double -0.0, %x
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ret double %y
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}
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; CHECK: foo:
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; CHECK: xorps
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; CHECK: xor
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define float @foo(float %x) nounwind {
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%y = fsub float -0.0, %x
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ret float %y
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