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Correct POP handling for v7m

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225972 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jyoti Allur 2015-01-14 10:48:16 +00:00
parent 4010b7d75a
commit fd06dd8efc
2 changed files with 15 additions and 9 deletions
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8
lib/Target/ARM/AsmParser/ARMAsmParser.cpp
View File

@ -190,7 +190,7 @@ class ARMAsmParser : public MCTargetAsmParser {
} }
bool validatetLDMRegList(MCInst Inst, const OperandVector &Operands, bool validatetLDMRegList(MCInst Inst, const OperandVector &Operands,
unsigned ListNo, bool IsPop = false); unsigned ListNo, bool IsARPop = false);
bool validatetSTMRegList(MCInst Inst, const OperandVector &Operands, bool validatetSTMRegList(MCInst Inst, const OperandVector &Operands,
unsigned ListNo); unsigned ListNo);
@ -6027,7 +6027,7 @@ static bool instIsBreakpoint(const MCInst &Inst) {
bool ARMAsmParser::validatetLDMRegList(MCInst Inst, bool ARMAsmParser::validatetLDMRegList(MCInst Inst,
const OperandVector &Operands, const OperandVector &Operands,
unsigned ListNo, bool IsPop) { unsigned ListNo, bool IsARPop) {
const ARMOperand &Op = static_cast<const ARMOperand &>(*Operands[ListNo]); const ARMOperand &Op = static_cast<const ARMOperand &>(*Operands[ListNo]);
bool HasWritebackToken = Op.isToken() && Op.getToken() == "!"; bool HasWritebackToken = Op.isToken() && Op.getToken() == "!";
@ -6035,7 +6035,7 @@ bool ARMAsmParser::validatetLDMRegList(MCInst Inst,
bool ListContainsLR = listContainsReg(Inst, ListNo, ARM::LR); bool ListContainsLR = listContainsReg(Inst, ListNo, ARM::LR);
bool ListContainsPC = listContainsReg(Inst, ListNo, ARM::PC); bool ListContainsPC = listContainsReg(Inst, ListNo, ARM::PC);
if (!IsPop && ListContainsSP) if (!IsARPop && ListContainsSP)
return Error(Operands[ListNo + HasWritebackToken]->getStartLoc(), return Error(Operands[ListNo + HasWritebackToken]->getStartLoc(),
"SP may not be in the register list"); "SP may not be in the register list");
else if (ListContainsPC && ListContainsLR) else if (ListContainsPC && ListContainsLR)
@ -6338,7 +6338,7 @@ bool ARMAsmParser::validateInstruction(MCInst &Inst,
!isThumbTwo()) !isThumbTwo())
return Error(Operands[2]->getStartLoc(), return Error(Operands[2]->getStartLoc(),
"registers must be in range r0-r7 or pc"); "registers must be in range r0-r7 or pc");
if (validatetLDMRegList(Inst, Operands, 2, /*IsPop=*/true)) if (validatetLDMRegList(Inst, Operands, 2, !isMClass()))
return true; return true;
break; break;
} }

16
test/MC/ARM/thumb-load-store-multiple.s
View File

@ -1,12 +1,16 @@
@ RUN: not llvm-mc -triple thumbv7-eabi -filetype asm -o - %s 2>&1 \ @ RUN: not llvm-mc -triple thumbv7-eabi -filetype asm -o - %s 2>&1 \
@ RUN: | FileCheck %s @ RUN: | FileCheck %s
@ RUN: not llvm-mc -triple thumbv7a-eabi -filetype asm -o - %s 2>&1 \
@ RUN: | FileCheck --check-prefix=CHECK --check-prefix=CHECK-V7A %s
@ RUN: not llvm-mc -triple thumbv7m-eabi -filetype asm -o - %s 2>&1 \
@ RUN: | FileCheck --check-prefix=CHECK --check-prefix=CHECK-V7M %s
.syntax unified .syntax unified
.thumb .thumb
.global ldm .global ldm
.type ldm,%function .type ldm,%function
ldb: ldm:
ldm r0!, {r1, sp} ldm r0!, {r1, sp}
@ CHECK: error: SP may not be in the register list @ CHECK: error: SP may not be in the register list
@ CHECK: ldm r0!, {r1, sp} @ CHECK: ldm r0!, {r1, sp}
@ -27,7 +31,7 @@ ldb:
ldmdb: ldmdb:
ldmdb r0!, {r1, sp} ldmdb r0!, {r1, sp}
@ CHECK: error: SP may not be in the register list @ CHECK: error: SP may not be in the register list
ldm r0!, {lr, pc} ldmdb r0!, {lr, pc}
@ error: PC and LR may not be in the register list simultaneously @ error: PC and LR may not be in the register list simultaneously
itt eq itt eq
ldmeq r0!, {r1, pc} ldmeq r0!, {r1, pc}
@ -63,12 +67,14 @@ push:
@ CHECK: error: SP may not be in the register list @ CHECK: error: SP may not be in the register list
push {pc} push {pc}
@ CHECK: error: PC may not be in the register list @ CHECK: error: PC may not be in the register list
push {sp,pc} push {sp, pc}
@ CHECK: error: SP and PC may not be in the register list @ CHECK: error: SP and PC may not be in the register list
.global pop .global pop
.type pop,%function .type pop,%function
pop: pop:
pop {sp}
@ CHECK-V7M: error: SP may not be in the register list
pop {lr, pc} pop {lr, pc}
@ CHECK: error: PC and LR may not be in the register list simultaneously @ CHECK: error: PC and LR may not be in the register list simultaneously
@ CHECK: pop {lr, pc} @ CHECK: pop {lr, pc}
@ -84,9 +90,9 @@ pop:
.type valid,%function .type valid,%function
valid: valid:
pop {sp} pop {sp}
@ CHECK: ldr sp, [sp], #4 @ CHECK-V7A: ldr sp, [sp], #4
pop {sp, pc} pop {sp, pc}
@ CHECK: pop.w {sp, pc} @ CHECK-V7A: pop.w {sp, pc}
push.w {r0} push.w {r0}
@ CHECK: str r0, [sp, #-4] @ CHECK: str r0, [sp, #-4]
pop.w {r0} pop.w {r0}