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[AVX512] alignr: Use suffix rather than name argument to multiclass

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Again no functional change.  This prepares for the suffix to be used with the
intrinsic matching.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214886 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Adam Nemet 2014-08-05 17:22:52 +00:00
parent c2b5d99995
commit fd52de3695
1 changed files with 5 additions and 5 deletions
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10
lib/Target/X86/X86InstrAVX512.td
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@ -4461,12 +4461,12 @@ def : Pat<(v8i64 (X86Shufp VR512:$src1,
(memopv8i64 addr:$src2), (i8 imm:$imm))),
(VSHUFPDZrmi VR512:$src1, addr:$src2, imm:$imm)>;
multiclass avx512_alignr<string OpcodeStr, RegisterClass RC,
multiclass avx512_alignr<string Suffix, RegisterClass RC,
X86MemOperand x86memop, ValueType IntVT,
ValueType FloatVT> {
def rri : AVX512AIi8<0x03, MRMSrcReg, (outs RC:$dst),
(ins RC:$src1, RC:$src2, i8imm:$src3),
!strconcat(OpcodeStr,
!strconcat("valign"##Suffix,
" \t{$src3, $src2, $src1, $dst|"
"$dst, $src1, $src2, $src3}"),
[(set RC:$dst,
@ -4480,14 +4480,14 @@ multiclass avx512_alignr<string OpcodeStr, RegisterClass RC,
let mayLoad = 1 in
def rmi : AVX512AIi8<0x03, MRMSrcMem, (outs RC:$dst),
(ins RC:$src1, x86memop:$src2, i8imm:$src3),
!strconcat(OpcodeStr,
!strconcat("valign"##Suffix,
" \t{$src3, $src2, $src1, $dst|"
"$dst, $src1, $src2, $src3}"),
[]>, EVEX_4V;
}
defm VALIGND : avx512_alignr<"valignd", VR512, i512mem, v16i32, v16f32>,
defm VALIGND : avx512_alignr<"d", VR512, i512mem, v16i32, v16f32>,
EVEX_V512, EVEX_CD8<32, CD8VF>;
defm VALIGNQ : avx512_alignr<"valignq", VR512, i512mem, v8i64, v8f64>,
defm VALIGNQ : avx512_alignr<"q", VR512, i512mem, v8i64, v8f64>,
VEX_W, EVEX_V512, EVEX_CD8<64, CD8VF>;
// Helper fragments to match sext vXi1 to vXiY.