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Clean up: remove now unnecessary Constraints

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106361 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Bruno Cardoso Lopes
2010-06-19 00:09:27 +00:00
parent 9559e3b99a
commit fda1acb389
1 changed files with 1 additions and 3 deletions
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4
lib/Target/X86/X86InstrSSE.td
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@@ -699,11 +699,10 @@ multiclass sse12_fp_packed<bits<8> opc, string OpcodeStr, SDNode OpNode,
/// These three forms can each be reg+reg or reg+mem, so there are a total of /// These three forms can each be reg+reg or reg+mem, so there are a total of
/// six "instructions". /// six "instructions".
/// ///
let Constraints = "$src1 = $dst" in {
multiclass basic_sse12_fp_binop_rm<bits<8> opc, string OpcodeStr, multiclass basic_sse12_fp_binop_rm<bits<8> opc, string OpcodeStr,
SDNode OpNode, bit Commutable = 0> { SDNode OpNode, bit Commutable = 0> {
let Constraints = "", isAsmParserOnly = 1 in { let isAsmParserOnly = 1 in {
defm V#NAME#SS : sse12_fp_scalar<opc, defm V#NAME#SS : sse12_fp_scalar<opc,
!strconcat(OpcodeStr, "ss\t{$src2, $src1, $dst|$dst, $src1, $src2}"), !strconcat(OpcodeStr, "ss\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
OpNode, FR32, f32mem>, XS, VEX_4V; OpNode, FR32, f32mem>, XS, VEX_4V;
@@ -757,7 +756,6 @@ multiclass basic_sse12_fp_binop_rm<bits<8> opc, string OpcodeStr,
"2", "_sd", sdmem, sse_load_f64>, XD; "2", "_sd", sdmem, sse_load_f64>, XD;
} }
} }
}
// Arithmetic instructions // Arithmetic instructions
defm ADD : basic_sse12_fp_binop_rm<0x58, "add", fadd, 1>; defm ADD : basic_sse12_fp_binop_rm<0x58, "add", fadd, 1>;