6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-09-28 22:55:52 +00:00
Code Issues Projects Releases Wiki Activity

Fix deprecated operator[] warnings

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11577 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2004-02-18 16:38:18 +00:00
parent e9118f3694
commit fdc01cedd4
2 changed files with 34 additions and 30 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

32
lib/CodeGen/InstrSched/InstrScheduling.cpp
View File

@ -1175,25 +1175,29 @@ static void ReplaceNopsWithUsefulInstr(SchedulingManager& S,
// //
unsigned int firstDelaySlotIdx = node->getOrigIndexInBB() + 1; unsigned int firstDelaySlotIdx = node->getOrigIndexInBB() + 1;
MachineBasicBlock& MBB = node->getMachineBasicBlock(); MachineBasicBlock& MBB = node->getMachineBasicBlock();
assert(&MBB[firstDelaySlotIdx - 1] == brInstr && MachineBasicBlock::iterator MBBI = MBB.begin();
std::advance(MBBI, firstDelaySlotIdx - 1);
assert(&*MBBI++ == brInstr &&
"Incorrect instr. index in basic block for brInstr"); "Incorrect instr. index in basic block for brInstr");
// First find all useful instructions already in the delay slots // First find all useful instructions already in the delay slots
// and USE THEM. We'll throw away the unused alternatives below // and USE THEM. We'll throw away the unused alternatives below
// //
for (unsigned i=firstDelaySlotIdx; i < firstDelaySlotIdx + ndelays; ++i) MachineBasicBlock::iterator Tmp = MBBI;
if (! mii.isNop(MBB[i].getOpcode())) for (unsigned i = 0; i != ndelays; ++i, ++MBBI)
if (!mii.isNop(MBBI->getOpcode()))
sdelayNodeVec.insert(sdelayNodeVec.begin(), sdelayNodeVec.insert(sdelayNodeVec.begin(),
graph->getGraphNodeForInstr(&MBB[i])); graph->getGraphNodeForInstr(MBBI));
MBBI = Tmp;
// Then find the NOPs and keep only as many as are needed. // Then find the NOPs and keep only as many as are needed.
// Put the rest in nopNodeVec to be deleted. // Put the rest in nopNodeVec to be deleted.
for (unsigned i=firstDelaySlotIdx; i < firstDelaySlotIdx + ndelays; ++i) for (unsigned i=firstDelaySlotIdx; i < firstDelaySlotIdx+ndelays; ++i, ++MBBI)
if (mii.isNop(MBB[i].getOpcode())) if (mii.isNop(MBBI->getOpcode()))
if (sdelayNodeVec.size() < ndelays) if (sdelayNodeVec.size() < ndelays)
sdelayNodeVec.push_back(graph->getGraphNodeForInstr(&MBB[i])); sdelayNodeVec.push_back(graph->getGraphNodeForInstr(MBBI));
else { else {
nopNodeVec.push_back(graph->getGraphNodeForInstr(&MBB[i])); nopNodeVec.push_back(graph->getGraphNodeForInstr(MBBI));
//remove the MI from the Machine Code For Instruction //remove the MI from the Machine Code For Instruction
const TerminatorInst *TI = MBB.getBasicBlock()->getTerminator(); const TerminatorInst *TI = MBB.getBasicBlock()->getTerminator();
@ -1202,7 +1206,7 @@ static void ReplaceNopsWithUsefulInstr(SchedulingManager& S,
for(MachineCodeForInstruction::iterator mciI=llvmMvec.begin(), for(MachineCodeForInstruction::iterator mciI=llvmMvec.begin(),
mciE=llvmMvec.end(); mciI!=mciE; ++mciI){ mciE=llvmMvec.end(); mciI!=mciE; ++mciI){
if (*mciI == &MBB[i]) if (*mciI == MBBI)
llvmMvec.erase(mciI); llvmMvec.erase(mciI);
} }
} }
@ -1281,11 +1285,9 @@ ChooseInstructionsForDelaySlots(SchedulingManager& S, MachineBasicBlock &MBB,
// brInstr will be NULL so this will handle the branch instrs. as well. // brInstr will be NULL so this will handle the branch instrs. as well.
// //
delayNodeVec.clear(); delayNodeVec.clear();
for (unsigned i=0; i < MBB.size(); ++i) for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end(); I != E; ++I)
if (&MBB[i] != brInstr && if (I != brInstr && mii.getNumDelaySlots(I->getOpcode()) > 0) {
mii.getNumDelaySlots(MBB[i].getOpcode()) > 0) SchedGraphNode* node = graph->getGraphNodeForInstr(I);
{
SchedGraphNode* node = graph->getGraphNodeForInstr(&MBB[i]);
ReplaceNopsWithUsefulInstr(S, node, delayNodeVec, graph); ReplaceNopsWithUsefulInstr(S, node, delayNodeVec, graph);
} }
} }

32
lib/Target/SparcV9/InstrSched/InstrScheduling.cpp
View File

@ -1175,25 +1175,29 @@ static void ReplaceNopsWithUsefulInstr(SchedulingManager& S,
// //
unsigned int firstDelaySlotIdx = node->getOrigIndexInBB() + 1; unsigned int firstDelaySlotIdx = node->getOrigIndexInBB() + 1;
MachineBasicBlock& MBB = node->getMachineBasicBlock(); MachineBasicBlock& MBB = node->getMachineBasicBlock();
assert(&MBB[firstDelaySlotIdx - 1] == brInstr && MachineBasicBlock::iterator MBBI = MBB.begin();
std::advance(MBBI, firstDelaySlotIdx - 1);
assert(&*MBBI++ == brInstr &&
"Incorrect instr. index in basic block for brInstr"); "Incorrect instr. index in basic block for brInstr");
// First find all useful instructions already in the delay slots // First find all useful instructions already in the delay slots
// and USE THEM. We'll throw away the unused alternatives below // and USE THEM. We'll throw away the unused alternatives below
// //
for (unsigned i=firstDelaySlotIdx; i < firstDelaySlotIdx + ndelays; ++i) MachineBasicBlock::iterator Tmp = MBBI;
if (! mii.isNop(MBB[i].getOpcode())) for (unsigned i = 0; i != ndelays; ++i, ++MBBI)
if (!mii.isNop(MBBI->getOpcode()))
sdelayNodeVec.insert(sdelayNodeVec.begin(), sdelayNodeVec.insert(sdelayNodeVec.begin(),
graph->getGraphNodeForInstr(&MBB[i])); graph->getGraphNodeForInstr(MBBI));
MBBI = Tmp;
// Then find the NOPs and keep only as many as are needed. // Then find the NOPs and keep only as many as are needed.
// Put the rest in nopNodeVec to be deleted. // Put the rest in nopNodeVec to be deleted.
for (unsigned i=firstDelaySlotIdx; i < firstDelaySlotIdx + ndelays; ++i) for (unsigned i=firstDelaySlotIdx; i < firstDelaySlotIdx+ndelays; ++i, ++MBBI)
if (mii.isNop(MBB[i].getOpcode())) if (mii.isNop(MBBI->getOpcode()))
if (sdelayNodeVec.size() < ndelays) if (sdelayNodeVec.size() < ndelays)
sdelayNodeVec.push_back(graph->getGraphNodeForInstr(&MBB[i])); sdelayNodeVec.push_back(graph->getGraphNodeForInstr(MBBI));
else { else {
nopNodeVec.push_back(graph->getGraphNodeForInstr(&MBB[i])); nopNodeVec.push_back(graph->getGraphNodeForInstr(MBBI));
//remove the MI from the Machine Code For Instruction //remove the MI from the Machine Code For Instruction
const TerminatorInst *TI = MBB.getBasicBlock()->getTerminator(); const TerminatorInst *TI = MBB.getBasicBlock()->getTerminator();
@ -1202,7 +1206,7 @@ static void ReplaceNopsWithUsefulInstr(SchedulingManager& S,
for(MachineCodeForInstruction::iterator mciI=llvmMvec.begin(), for(MachineCodeForInstruction::iterator mciI=llvmMvec.begin(),
mciE=llvmMvec.end(); mciI!=mciE; ++mciI){ mciE=llvmMvec.end(); mciI!=mciE; ++mciI){
if (*mciI == &MBB[i]) if (*mciI == MBBI)
llvmMvec.erase(mciI); llvmMvec.erase(mciI);
} }
} }
@ -1281,11 +1285,9 @@ ChooseInstructionsForDelaySlots(SchedulingManager& S, MachineBasicBlock &MBB,
// brInstr will be NULL so this will handle the branch instrs. as well. // brInstr will be NULL so this will handle the branch instrs. as well.
// //
delayNodeVec.clear(); delayNodeVec.clear();
for (unsigned i=0; i < MBB.size(); ++i) for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end(); I != E; ++I)
if (&MBB[i] != brInstr && if (I != brInstr && mii.getNumDelaySlots(I->getOpcode()) > 0) {
mii.getNumDelaySlots(MBB[i].getOpcode()) > 0) SchedGraphNode* node = graph->getGraphNodeForInstr(I);
{
SchedGraphNode* node = graph->getGraphNodeForInstr(&MBB[i]);
ReplaceNopsWithUsefulInstr(S, node, delayNodeVec, graph); ReplaceNopsWithUsefulInstr(S, node, delayNodeVec, graph);
} }
} }