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Fold two related tests into the newly FileCheck-ized test, migrating
them to FileCheck as well. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123154 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1,19 +0,0 @@
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; RUN: opt < %s -instcombine -S | not grep extractelement
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define void @get_image() nounwind {
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entry:
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%0 = call i32 @fgetc(i8* null) nounwind ; <i32> [#uses=1]
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%1 = trunc i32 %0 to i8 ; <i8> [#uses=1]
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%tmp2 = insertelement <100 x i8> zeroinitializer, i8 %1, i32 1 ; <<100 x i8>> [#uses=1]
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%tmp1 = extractelement <100 x i8> %tmp2, i32 0 ; <i8> [#uses=1]
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%2 = icmp eq i8 %tmp1, 80 ; <i1> [#uses=1]
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br i1 %2, label %bb2, label %bb3
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bb2: ; preds = %entry
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br label %bb3
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bb3: ; preds = %bb2, %entry
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unreachable
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}
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declare i32 @fgetc(i8*)
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@ -1,14 +0,0 @@
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; RUN: opt < %s -instcombine -S | not grep load
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; PR4340
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define void @vac(<4 x float>* nocapture %a) nounwind {
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entry:
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%tmp1 = load <4 x float>* %a ; <<4 x float>> [#uses=1]
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%vecins = insertelement <4 x float> %tmp1, float 0.000000e+00, i32 0 ; <<4 x float>> [#uses=1]
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%vecins4 = insertelement <4 x float> %vecins, float 0.000000e+00, i32 1; <<4 x float>> [#uses=1]
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%vecins6 = insertelement <4 x float> %vecins4, float 0.000000e+00, i32 2; <<4 x float>> [#uses=1]
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%vecins8 = insertelement <4 x float> %vecins6, float 0.000000e+00, i32 3; <<4 x float>> [#uses=1]
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store <4 x float> %vecins8, <4 x float>* %a
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ret void
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}
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@ -36,6 +36,42 @@ define i32 @test2(float %f) {
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ret i32 %tmp21
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ret i32 %tmp21
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}
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}
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define void @get_image() nounwind {
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; CHECK: @get_image
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; CHECK-NOT: extractelement
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; CHECK: unreachable
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entry:
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%0 = call i32 @fgetc(i8* null) nounwind ; <i32> [#uses=1]
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%1 = trunc i32 %0 to i8 ; <i8> [#uses=1]
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%tmp2 = insertelement <100 x i8> zeroinitializer, i8 %1, i32 1 ; <<100 x i8>> [#uses=1]
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%tmp1 = extractelement <100 x i8> %tmp2, i32 0 ; <i8> [#uses=1]
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%2 = icmp eq i8 %tmp1, 80 ; <i1> [#uses=1]
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br i1 %2, label %bb2, label %bb3
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bb2: ; preds = %entry
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br label %bb3
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bb3: ; preds = %bb2, %entry
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unreachable
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}
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; PR4340
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define void @vac(<4 x float>* nocapture %a) nounwind {
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; CHECK: @vac
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; CHECK-NOT: load
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; CHECK: ret
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entry:
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%tmp1 = load <4 x float>* %a ; <<4 x float>> [#uses=1]
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%vecins = insertelement <4 x float> %tmp1, float 0.000000e+00, i32 0 ; <<4 x float>> [#uses=1]
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%vecins4 = insertelement <4 x float> %vecins, float 0.000000e+00, i32 1; <<4 x float>> [#uses=1]
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%vecins6 = insertelement <4 x float> %vecins4, float 0.000000e+00, i32 2; <<4 x float>> [#uses=1]
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%vecins8 = insertelement <4 x float> %vecins6, float 0.000000e+00, i32 3; <<4 x float>> [#uses=1]
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store <4 x float> %vecins8, <4 x float>* %a
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ret void
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}
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declare i32 @fgetc(i8*)
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declare <4 x float> @llvm.x86.sse.sub.ss(<4 x float>, <4 x float>)
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declare <4 x float> @llvm.x86.sse.sub.ss(<4 x float>, <4 x float>)
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declare <4 x float> @llvm.x86.sse.mul.ss(<4 x float>, <4 x float>)
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declare <4 x float> @llvm.x86.sse.mul.ss(<4 x float>, <4 x float>)
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