6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-08-05 13:26:55 +00:00
Code Issues Projects Releases Wiki Activity

Replace TSFlagsFields and TSFlagsShifts with a simpler TSFlags field.

Browse Source 
When a target instruction wants to set target-specific flags, it should simply
set bits in the TSFlags bit vector defined in the Instruction TableGen class.

This works well because TableGen resolves member references late:

class I : Instruction {
  AddrMode AM = AddrModeNone;
  let TSFlags{3-0} = AM.Value;
}

let AM = AddrMode4 in
def ADD : I;

TSFlags gets the expected bits from AddrMode4 in this example.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100384 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jakob Stoklund Olesen
2010-04-05 03:10:20 +00:00
parent ba79d72eab
commit fddb7667ca
18 changed files with 61 additions and 199 deletions
Download Patch File Download Diff File Expand all files Collapse all files

25
lib/Target/ARM/ARMInstrFormats.td
View File

@@ -185,28 +185,25 @@ class InstTemplate<AddrMode am, SizeFlagVal sz, IndexMode im,
: Instruction {
let Namespace = "ARM";
// TSFlagsFields
AddrMode AM = am;
bits<4> AddrModeBits = AM.Value;
SizeFlagVal SZ = sz;
bits<3> SizeFlag = SZ.Value;
IndexMode IM = im;
bits<2> IndexModeBits = IM.Value;
Format F = f;
bits<6> Form = F.Value;
Domain D = d;
bits<2> Dom = D.Value;
//
// Attributes specific to ARM instructions...
//
bit isUnaryDataProc = 0;
bit canXformTo16Bit = 0;
// The layout of TSFlags should be kept in sync with ARMBaseInstrInfo.h.
let TSFlags{3-0} = AM.Value;
let TSFlags{6-4} = SZ.Value;
let TSFlags{8-7} = IndexModeBits;
let TSFlags{14-9} = Form;
let TSFlags{15} = isUnaryDataProc;
let TSFlags{16} = canXformTo16Bit;
let TSFlags{18-17} = D.Value;
let Constraints = cstr;
let Itinerary = itin;
}
@@ -1317,7 +1314,7 @@ class ADI5<bits<4> opcod1, bits<2> opcod2, dag oops, dag iops,
let Inst{11-8} = 0b1011;
// 64-bit loads & stores operate on both NEON and VFP pipelines.
let Dom = VFPNeonDomain.Value;
let D = VFPNeonDomain;
}
class ASI5<bits<4> opcod1, bits<2> opcod2, dag oops, dag iops,
@@ -1341,7 +1338,7 @@ class AXDI5<dag oops, dag iops, IndexMode im, InstrItinClass itin,
let Inst{11-8} = 0b1011;
// 64-bit loads & stores operate on both NEON and VFP pipelines.
let Dom = VFPNeonDomain.Value;
let D = VFPNeonDomain;
}
class AXSI5<dag oops, dag iops, IndexMode im, InstrItinClass itin,