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Add support for dynamic stack realignment when in thumb1 mode.
rdar://10288916 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142337 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -626,13 +626,10 @@ bool ARMBaseRegisterInfo::hasBasePointer(const MachineFunction &MF) const {
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bool ARMBaseRegisterInfo::canRealignStack(const MachineFunction &MF) const {
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bool ARMBaseRegisterInfo::canRealignStack(const MachineFunction &MF) const {
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const MachineFrameInfo *MFI = MF.getFrameInfo();
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const MachineFrameInfo *MFI = MF.getFrameInfo();
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const ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>();
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// We can't realign the stack if:
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// We can't realign the stack if:
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// 1. Dynamic stack realignment is explicitly disabled,
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// 1. Dynamic stack realignment is explicitly disabled,
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// 2. This is a Thumb1 function (it's not useful, so we don't bother), or
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// 2. There are VLAs in the function and the base pointer is disabled.
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// 3. There are VLAs in the function and the base pointer is disabled.
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return (RealignStack && (!MFI->hasVarSizedObjects() || EnableBasePointer));
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return (RealignStack && !AFI->isThumb1OnlyFunction() &&
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(!MFI->hasVarSizedObjects() || EnableBasePointer));
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}
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}
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bool ARMBaseRegisterInfo::
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bool ARMBaseRegisterInfo::
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@ -881,10 +881,12 @@ ARMFrameLowering::processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
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// for sure what the stack size will be, but for this, an estimate is good
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// for sure what the stack size will be, but for this, an estimate is good
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// enough. If there anything changes it, it'll be a spill, which implies
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// enough. If there anything changes it, it'll be a spill, which implies
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// we've used all the registers and so R4 is already used, so not marking
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// we've used all the registers and so R4 is already used, so not marking
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// it here will be OK.
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// it here will be OK. Also spill R4 if Thumb1 function requires stack
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// realignment.
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// FIXME: It will be better just to find spare register here.
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// FIXME: It will be better just to find spare register here.
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unsigned StackSize = estimateStackSize(MF);
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unsigned StackSize = estimateStackSize(MF);
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if (MFI->hasVarSizedObjects() || StackSize > 508)
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if (MFI->hasVarSizedObjects() || RegInfo->needsStackRealignment(MF) ||
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StackSize > 508)
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MF.getRegInfo().setPhysRegUsed(ARM::R4);
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MF.getRegInfo().setPhysRegUsed(ARM::R4);
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}
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}
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@ -155,10 +155,32 @@ void Thumb1FrameLowering::emitPrologue(MachineFunction &MF) const {
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AFI->setGPRCalleeSavedArea2Size(GPRCS2Size);
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AFI->setGPRCalleeSavedArea2Size(GPRCS2Size);
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AFI->setDPRCalleeSavedAreaSize(DPRCSSize);
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AFI->setDPRCalleeSavedAreaSize(DPRCSSize);
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// Thumb1 does not currently support dynamic stack realignment. Report a
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// If we need dynamic stack realignment, do it here. Be paranoid and make
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// fatal error rather then silently generate bad code.
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// sure if we also have VLAs, we have a base pointer for frame access.
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if (RegInfo->needsStackRealignment(MF))
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if (RegInfo->needsStackRealignment(MF)) {
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report_fatal_error("Dynamic stack realignment not supported for thumb1.");
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// We cannot use sp as source/dest register here, thus we're emitting the
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// following sequence:
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// mov r4, sp
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// lsrs r4, r4, Log2MaxAlign
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// lsls r4, r4, Log2MaxAlign
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// mov sp, r4
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unsigned MaxAlign = MFI->getMaxAlignment();
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unsigned Log2MaxAlign = Log2_32(MaxAlign);
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AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVr), ARM::R4)
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.addReg(ARM::SP, RegState::Kill));
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AddDefaultPred(AddDefaultT1CC(BuildMI(MBB, MBBI, dl, TII.get(ARM::tLSRri),
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ARM::R4))
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.addReg(ARM::R4, RegState::Kill)
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.addImm(Log2MaxAlign));
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AddDefaultPred(AddDefaultT1CC(BuildMI(MBB, MBBI, dl, TII.get(ARM::tLSLri),
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ARM::R4))
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.addReg(ARM::R4, RegState::Kill)
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.addImm(Log2MaxAlign));
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AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVr), ARM::SP)
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.addReg(ARM::R4, RegState::Kill));
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AFI->setShouldRestoreSPFromFP(true);
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}
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// If we need a base pointer, set it up here. It's whatever the value
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// If we need a base pointer, set it up here. It's whatever the value
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// of the stack pointer is at this point. Any variable size objects
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// of the stack pointer is at this point. Any variable size objects
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40
test/CodeGen/ARM/thumb1-dynrealign.ll
Normal file
40
test/CodeGen/ARM/thumb1-dynrealign.ll
Normal file
@ -0,0 +1,40 @@
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; RUN: llc < %s -mtriple=thumbv6-apple-darwin | FileCheck %s
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; Normal load from SP
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define void @SP(i32 %i) nounwind uwtable ssp {
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entry:
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; CHECK: @SP
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; CHECK: push {r7, lr}
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; CHECK-NEXT: mov r7, sp
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; CHECK-NEXT: sub sp, #4
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; CHECK-NEXT: mov r1, sp
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; CHECK-NEXT: str r0, [r1]
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; CHECK-NEXT: mov r0, sp
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; CHECK-NEXT: blx _SP_
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; CHECK-NEXT: add sp, #4
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; CHECK-NEXT: pop {r7, pc}
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%i.addr = alloca i32, align 4
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store i32 %i, i32* %i.addr, align 4
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call void @SP_(i32* %i.addr)
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ret void
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}
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declare void @SP_(i32*)
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; Dynamic stack realignment
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define void @FP(double %a) nounwind uwtable ssp {
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entry:
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; CHECK: mov r4, sp
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; CHECK-NEXT: lsrs r4, r4, #3
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; CHECK-NEXT: lsls r4, r4, #3
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; CHECK-NEXT: mov sp, r4
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; Restore from FP
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; CHECK: subs r4, r7, #4
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; CHECK: mov sp, r4
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%a.addr = alloca double, align 8
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store double %a, double* %a.addr, align 8
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call void @FP_(double* %a.addr)
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ret void
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}
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declare void @FP_(double*)
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