mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-08-23 17:29:19 +00:00
Revert "Add a late SSEDomainFix pass that twiddles SSE instructions to avoid domain crossings."
This reverts commit 99345. It was breaking buildbots. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99352 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jakob Stoklund Olesen
parent
ff54784683
commit
fe4b92baf1
@ -15,7 +15,6 @@ tablegen(X86GenCallingConv.inc -gen-callingconv)
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tablegen(X86GenSubtarget.inc -gen-subtarget)
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set(sources
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SSEDomainFix.cpp
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X86AsmBackend.cpp
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X86CodeEmitter.cpp
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X86COFFMachineModuleInfo.cpp
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@ -1,536 +0,0 @@
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//===- SSEDomainFix.cpp - Use proper int/float domain for SSE ---*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the SSEDomainFix pass.
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//
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// Some SSE instructions like mov, and, or, xor are available in different
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// variants for different operand types. These variant instructions are
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// equivalent, but on Nehalem and newer cpus there is extra latency
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// transferring data between integer and floating point domains.
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//
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// This pass changes the variant instructions to minimize domain crossings.
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//
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//===----------------------------------------------------------------------===//
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#define DEBUG_TYPE "sse-domain-fix"
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#include "X86InstrInfo.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/ADT/DepthFirstIterator.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/raw_ostream.h"
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using namespace llvm;
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namespace {
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class SSEDomainFixPass : public MachineFunctionPass {
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static char ID;
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const X86InstrInfo *TII;
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MachineFunction *MF;
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MachineBasicBlock *MBB;
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public:
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SSEDomainFixPass() : MachineFunctionPass(&ID) {}
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virtual void getAnalysisUsage(AnalysisUsage &AU) const {
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AU.setPreservesAll();
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MachineFunctionPass::getAnalysisUsage(AU);
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}
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virtual bool runOnMachineFunction(MachineFunction &MF);
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virtual const char *getPassName() const {
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return "SSE execution domain fixup";
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}
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private:
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void enterBasicBlock(MachineBasicBlock *MBB);
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};
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}
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void SSEDomainFixPass::enterBasicBlock(MachineBasicBlock *mbb) {
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MBB = mbb;
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DEBUG(dbgs() << "Entering MBB " << MBB->getName() << "\n");
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}
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bool SSEDomainFixPass::runOnMachineFunction(MachineFunction &mf) {
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MF = &mf;
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TII = static_cast<const X86InstrInfo*>(MF->getTarget().getInstrInfo());
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MachineBasicBlock *Entry = MF->begin();
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SmallPtrSet<MachineBasicBlock*, 16> Visited;
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for (df_ext_iterator<MachineBasicBlock*,
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SmallPtrSet<MachineBasicBlock*, 16> >
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DFI = df_ext_begin(Entry, Visited), DFE = df_ext_end(Entry, Visited);
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DFI != DFE; ++DFI) {
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enterBasicBlock(*DFI);
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for (MachineBasicBlock::iterator I = MBB->begin(), E = MBB->end(); I != E;
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++I) {
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MachineInstr *MI = I;
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const unsigned *equiv = 0;
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X86InstrInfo::SSEDomain domain = TII->GetSSEDomain(MI, equiv);
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DEBUG(dbgs() << "isd-"[domain] << (equiv ? "* " : " ") << *MI);
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}
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}
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return false;
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}
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FunctionPass *llvm::createSSEDomainFixPass() {
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return new SSEDomainFixPass();
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}
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// These are the replaceable instructions. Some of these have _Int variants
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// that we don't include here. We don't want to replace instructions selected
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// by intrinsics.
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static const unsigned ReplaceableInstrs[][3] = {
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//PackedInt PackedSingle PackedDouble
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{ X86::MOVDQAmr, X86::MOVAPSmr, X86::MOVAPDmr },
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{ X86::MOVDQArm, X86::MOVAPSrm, X86::MOVAPDrm },
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{ X86::MOVDQArr, X86::MOVAPSrr, X86::MOVAPDrr },
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{ X86::MOVDQUmr, X86::MOVUPSmr, X86::MOVUPDmr },
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{ X86::MOVDQUrm, X86::MOVUPSrm, X86::MOVUPDrm },
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{ X86::MOVNTDQmr, X86::MOVNTPSmr, X86::MOVNTPDmr },
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{ X86::PANDNrm, X86::ANDNPSrm, X86::ANDNPDrm },
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{ X86::PANDNrr, X86::ANDNPSrr, X86::ANDNPDrr },
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{ X86::PANDrm, X86::ANDPSrm, X86::ANDPDrm },
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{ X86::PANDrr, X86::ANDPSrr, X86::ANDPDrr },
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{ X86::PORrm, X86::ORPSrm, X86::ORPDrm },
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{ X86::PORrr, X86::ORPSrr, X86::ORPDrr },
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{ X86::PUNPCKHQDQrm, X86::UNPCKHPSrm, X86::UNPCKHPDrm },
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{ X86::PUNPCKHQDQrr, X86::UNPCKHPSrr, X86::UNPCKHPDrr },
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{ X86::PUNPCKLQDQrm, X86::UNPCKLPSrm, X86::UNPCKLPDrm },
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{ X86::PUNPCKLQDQrr, X86::UNPCKLPSrr, X86::UNPCKLPDrr },
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{ X86::PXORrm, X86::XORPSrm, X86::XORPDrm },
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{ X86::PXORrr, X86::XORPSrr, X86::XORPDrr },
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};
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void X86InstrInfo::populateSSEInstrDomainTable() {
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// Instructions that execute in the packed integer domain.
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static const unsigned PackedIntInstrs[] = {
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X86::LDDQUrm,
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X86::MASKMOVDQU,
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X86::MASKMOVDQU64,
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X86::MOVDI2PDIrm,
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X86::MOVDI2PDIrr,
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X86::MOVDQUmr_Int,
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X86::MOVDQUrm_Int,
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X86::MOVLQ128mr,
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X86::MOVNTDQArm,
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X86::MOVNTDQmr_Int,
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X86::MOVNTDQ_64mr,
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X86::MOVPDI2DImr,
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X86::MOVPDI2DIrr,
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X86::MOVPQI2QImr,
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X86::MOVPQIto64rr,
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X86::MOVQI2PQIrm,
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X86::MOVQxrxr,
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X86::MOVZDI2PDIrm,
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X86::MOVZDI2PDIrr,
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X86::MOVZPQILo2PQIrm,
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X86::MOVZPQILo2PQIrr,
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X86::MOVZQI2PQIrm,
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X86::MOVZQI2PQIrr,
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X86::MPSADBWrmi,
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X86::MPSADBWrri,
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X86::PABSBrm128,
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X86::PABSBrr128,
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X86::PABSDrm128,
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X86::PABSDrr128,
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X86::PABSWrm128,
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X86::PABSWrr128,
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X86::PACKSSDWrm,
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X86::PACKSSDWrr,
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X86::PACKSSWBrm,
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X86::PACKSSWBrr,
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X86::PACKUSDWrm,
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X86::PACKUSDWrr,
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X86::PACKUSWBrm,
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X86::PACKUSWBrr,
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X86::PADDBrm,
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X86::PADDBrr,
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X86::PADDDrm,
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X86::PADDDrr,
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X86::PADDQrm,
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X86::PADDQrr,
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X86::PADDSBrm,
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X86::PADDSBrr,
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X86::PADDSWrm,
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X86::PADDSWrr,
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X86::PADDUSBrm,
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X86::PADDUSBrr,
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X86::PADDUSWrm,
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X86::PADDUSWrr,
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X86::PADDWrm,
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X86::PADDWrr,
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X86::PALIGNR128rm,
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X86::PALIGNR128rr,
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X86::PAVGBrm,
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X86::PAVGBrr,
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X86::PAVGWrm,
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X86::PAVGWrr,
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X86::PBLENDVBrm0,
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X86::PBLENDVBrr0,
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X86::PBLENDWrmi,
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X86::PBLENDWrri,
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X86::PCMPEQBrm,
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X86::PCMPEQBrr,
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X86::PCMPEQDrm,
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X86::PCMPEQDrr,
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X86::PCMPEQQrm,
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X86::PCMPEQQrr,
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X86::PCMPEQWrm,
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X86::PCMPEQWrr,
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X86::PCMPESTRIArm,
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X86::PCMPESTRIArr,
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X86::PCMPESTRICrm,
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X86::PCMPESTRICrr,
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X86::PCMPESTRIOrm,
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X86::PCMPESTRIOrr,
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X86::PCMPESTRIrm,
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X86::PCMPESTRIrr,
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X86::PCMPESTRISrm,
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X86::PCMPESTRISrr,
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X86::PCMPESTRIZrm,
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X86::PCMPESTRIZrr,
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X86::PCMPESTRM128MEM,
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X86::PCMPESTRM128REG,
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X86::PCMPESTRM128rm,
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X86::PCMPESTRM128rr,
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X86::PCMPGTBrm,
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X86::PCMPGTBrr,
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X86::PCMPGTDrm,
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X86::PCMPGTDrr,
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X86::PCMPGTQrm,
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X86::PCMPGTQrr,
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X86::PCMPGTWrm,
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X86::PCMPGTWrr,
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X86::PCMPISTRIArm,
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X86::PCMPISTRIArr,
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X86::PCMPISTRICrm,
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X86::PCMPISTRICrr,
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X86::PCMPISTRIOrm,
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X86::PCMPISTRIOrr,
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X86::PCMPISTRIrm,
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X86::PCMPISTRIrr,
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X86::PCMPISTRISrm,
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X86::PCMPISTRISrr,
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X86::PCMPISTRIZrm,
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X86::PCMPISTRIZrr,
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X86::PCMPISTRM128MEM,
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X86::PCMPISTRM128REG,
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X86::PCMPISTRM128rm,
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X86::PCMPISTRM128rr,
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X86::PEXTRBmr,
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X86::PEXTRBrr,
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X86::PEXTRDmr,
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X86::PEXTRDrr,
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X86::PEXTRQmr,
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X86::PEXTRQrr,
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X86::PEXTRWmr,
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X86::PEXTRWri,
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X86::PHADDDrm128,
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X86::PHADDDrr128,
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X86::PHADDSWrm128,
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X86::PHADDSWrr128,
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X86::PHADDWrm128,
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X86::PHADDWrr128,
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X86::PHMINPOSUWrm128,
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X86::PHMINPOSUWrr128,
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X86::PHSUBDrm128,
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X86::PHSUBDrr128,
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X86::PHSUBSWrm128,
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X86::PHSUBSWrr128,
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X86::PHSUBWrm128,
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X86::PHSUBWrr128,
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X86::PINSRBrm,
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X86::PINSRBrr,
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X86::PINSRDrm,
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X86::PINSRDrr,
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X86::PINSRQrm,
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X86::PINSRQrr,
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X86::PINSRWrmi,
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X86::PINSRWrri,
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X86::PMADDUBSWrm128,
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X86::PMADDUBSWrr128,
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X86::PMADDWDrm,
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X86::PMADDWDrr,
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X86::PMAXSBrm,
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X86::PMAXSBrr,
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X86::PMAXSDrm,
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X86::PMAXSDrr,
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X86::PMAXSWrm,
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X86::PMAXSWrr,
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X86::PMAXUBrm,
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X86::PMAXUBrr,
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X86::PMAXUDrm,
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X86::PMAXUDrr,
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X86::PMAXUWrm,
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X86::PMAXUWrr,
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X86::PMINSBrm,
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X86::PMINSBrr,
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X86::PMINSDrm,
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X86::PMINSDrr,
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X86::PMINSWrm,
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X86::PMINSWrr,
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X86::PMINUBrm,
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X86::PMINUBrr,
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X86::PMINUDrm,
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X86::PMINUDrr,
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X86::PMINUWrm,
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X86::PMINUWrr,
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X86::PMOVSXBDrm,
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X86::PMOVSXBDrr,
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X86::PMOVSXBQrm,
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X86::PMOVSXBQrr,
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X86::PMOVSXBWrm,
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X86::PMOVSXBWrr,
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X86::PMOVSXDQrm,
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X86::PMOVSXDQrr,
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X86::PMOVSXWDrm,
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X86::PMOVSXWDrr,
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X86::PMOVSXWQrm,
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X86::PMOVSXWQrr,
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X86::PMOVZXBDrm,
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X86::PMOVZXBDrr,
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X86::PMOVZXBQrm,
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X86::PMOVZXBQrr,
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X86::PMOVZXBWrm,
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X86::PMOVZXBWrr,
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X86::PMOVZXDQrm,
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X86::PMOVZXDQrr,
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X86::PMOVZXWDrm,
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X86::PMOVZXWDrr,
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X86::PMOVZXWQrm,
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X86::PMOVZXWQrr,
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X86::PMULDQrm,
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X86::PMULDQrr,
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X86::PMULHRSWrm128,
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X86::PMULHRSWrr128,
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X86::PMULHUWrm,
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X86::PMULHUWrr,
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X86::PMULHWrm,
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X86::PMULHWrr,
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X86::PMULLDrm,
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X86::PMULLDrm_int,
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X86::PMULLDrr,
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X86::PMULLDrr_int,
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X86::PMULLWrm,
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X86::PMULLWrr,
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X86::PMULUDQrm,
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X86::PMULUDQrr,
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X86::PSADBWrm,
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X86::PSADBWrr,
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X86::PSHUFBrm128,
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X86::PSHUFBrr128,
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X86::PSHUFHWmi,
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X86::PSHUFHWri,
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X86::PSHUFLWmi,
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X86::PSHUFLWri,
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X86::PSIGNBrm128,
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X86::PSIGNBrr128,
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X86::PSIGNDrm128,
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X86::PSIGNDrr128,
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X86::PSIGNWrm128,
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X86::PSIGNWrr128,
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X86::PSLLDQri,
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X86::PSLLDri,
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X86::PSLLDrm,
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X86::PSLLDrr,
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X86::PSLLQri,
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X86::PSLLQrm,
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X86::PSLLQrr,
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X86::PSLLWri,
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X86::PSLLWrm,
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X86::PSLLWrr,
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X86::PSRADri,
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X86::PSRADrm,
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X86::PSRADrr,
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X86::PSRAWri,
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X86::PSRAWrm,
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X86::PSRAWrr,
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X86::PSRLDQri,
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X86::PSRLDri,
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X86::PSRLDrm,
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X86::PSRLDrr,
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X86::PSRLQri,
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X86::PSRLQrm,
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X86::PSRLQrr,
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X86::PSRLWri,
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X86::PSRLWrm,
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X86::PSRLWrr,
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X86::PSUBBrm,
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X86::PSUBBrr,
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X86::PSUBDrm,
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X86::PSUBDrr,
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X86::PSUBQrm,
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X86::PSUBQrr,
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X86::PSUBSBrm,
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X86::PSUBSBrr,
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X86::PSUBSWrm,
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X86::PSUBSWrr,
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X86::PSUBUSBrm,
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X86::PSUBUSBrr,
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X86::PSUBUSWrm,
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X86::PSUBUSWrr,
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X86::PSUBWrm,
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X86::PSUBWrr,
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X86::PUNPCKHBWrm,
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X86::PUNPCKHBWrr,
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X86::PUNPCKHWDrm,
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X86::PUNPCKHWDrr,
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X86::PUNPCKLBWrm,
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X86::PUNPCKLBWrr,
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X86::PUNPCKLWDrm,
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X86::PUNPCKLWDrr,
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};
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// Instructions that execute in the packed single domain.
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static const unsigned PackedSingleInstrs[] = {
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X86::ADDPSrm,
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X86::ADDPSrr,
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X86::ADDSUBPSrm,
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X86::ADDSUBPSrr,
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X86::BLENDPSrmi,
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X86::BLENDPSrri,
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X86::BLENDVPSrm0,
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X86::BLENDVPSrr0,
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X86::CMPPSrmi,
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X86::CMPPSrri,
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X86::DIVPSrm,
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X86::DIVPSrr,
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X86::DPPSrmi,
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X86::DPPSrri,
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X86::EXTRACTPSmr,
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X86::EXTRACTPSrr,
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X86::HADDPSrm,
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X86::HADDPSrr,
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X86::HSUBPSrm,
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X86::HSUBPSrr,
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X86::INSERTPSrm,
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X86::INSERTPSrr,
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X86::MAXPSrm,
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X86::MAXPSrm_Int,
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X86::MAXPSrr,
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X86::MAXPSrr_Int,
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X86::MINPSrm,
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X86::MINPSrm_Int,
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X86::MINPSrr,
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X86::MINPSrr_Int,
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X86::MOVHLPSrr,
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X86::MOVHPSmr,
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X86::MOVHPSrm,
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X86::MOVLHPSrr,
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X86::MOVLPSmr,
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X86::MOVLPSrm,
|
||||
X86::MOVMSKPSrr,
|
||||
X86::MOVNTPSmr_Int,
|
||||
X86::MOVSHDUPrm,
|
||||
X86::MOVSHDUPrr,
|
||||
X86::MOVSLDUPrm,
|
||||
X86::MOVSLDUPrr,
|
||||
X86::MOVUPSmr_Int,
|
||||
X86::MOVUPSrm_Int,
|
||||
X86::MULPSrm,
|
||||
X86::MULPSrr,
|
||||
X86::RCPPSm,
|
||||
X86::RCPPSm_Int,
|
||||
X86::RCPPSr,
|
||||
X86::RCPPSr_Int,
|
||||
X86::ROUNDPSm_Int,
|
||||
X86::ROUNDPSr_Int,
|
||||
X86::RSQRTPSm,
|
||||
X86::RSQRTPSm_Int,
|
||||
X86::RSQRTPSr,
|
||||
X86::RSQRTPSr_Int,
|
||||
X86::SQRTPSm,
|
||||
X86::SQRTPSm_Int,
|
||||
X86::SQRTPSr,
|
||||
X86::SQRTPSr_Int,
|
||||
X86::SUBPSrm,
|
||||
X86::SUBPSrr,
|
||||
};
|
||||
|
||||
// Instructions that execute in the packed double domain.
|
||||
static const unsigned PackedDoubleInstrs[] = {
|
||||
X86::ADDPDrm,
|
||||
X86::ADDPDrr,
|
||||
X86::ADDSUBPDrm,
|
||||
X86::ADDSUBPDrr,
|
||||
X86::BLENDPDrmi,
|
||||
X86::BLENDPDrri,
|
||||
X86::BLENDVPDrm0,
|
||||
X86::BLENDVPDrr0,
|
||||
X86::CMPPDrmi,
|
||||
X86::CMPPDrri,
|
||||
X86::DIVPDrm,
|
||||
X86::DIVPDrr,
|
||||
X86::DPPDrmi,
|
||||
X86::DPPDrri,
|
||||
X86::HADDPDrm,
|
||||
X86::HADDPDrr,
|
||||
X86::HSUBPDrm,
|
||||
X86::HSUBPDrr,
|
||||
X86::MAXPDrm,
|
||||
X86::MAXPDrm_Int,
|
||||
X86::MAXPDrr,
|
||||
X86::MAXPDrr_Int,
|
||||
X86::MINPDrm,
|
||||
X86::MINPDrm_Int,
|
||||
X86::MINPDrr,
|
||||
X86::MINPDrr_Int,
|
||||
X86::MOVHPDmr,
|
||||
X86::MOVHPDrm,
|
||||
X86::MOVLPDmr,
|
||||
X86::MOVLPDrm,
|
||||
X86::MOVMSKPDrr,
|
||||
X86::MOVNTPDmr_Int,
|
||||
X86::MOVUPDmr_Int,
|
||||
X86::MOVUPDrm_Int,
|
||||
X86::MULPDrm,
|
||||
X86::MULPDrr,
|
||||
X86::ROUNDPDm_Int,
|
||||
X86::ROUNDPDr_Int,
|
||||
X86::SQRTPDm,
|
||||
X86::SQRTPDm_Int,
|
||||
X86::SQRTPDr,
|
||||
X86::SQRTPDr_Int,
|
||||
X86::SUBPDrm,
|
||||
X86::SUBPDrr,
|
||||
};
|
||||
|
||||
// Add non-negative entries for forcing instructions.
|
||||
for (unsigned i = 0, e = array_lengthof(PackedIntInstrs); i != e; ++i)
|
||||
SSEInstrDomainTable.insert(std::make_pair(PackedIntInstrs[i],
|
||||
PackedInt));
|
||||
for (unsigned i = 0, e = array_lengthof(PackedSingleInstrs); i != e; ++i)
|
||||
SSEInstrDomainTable.insert(std::make_pair(PackedSingleInstrs[i],
|
||||
PackedSingle));
|
||||
for (unsigned i = 0, e = array_lengthof(PackedDoubleInstrs); i != e; ++i)
|
||||
SSEInstrDomainTable.insert(std::make_pair(PackedDoubleInstrs[i],
|
||||
PackedDouble));
|
||||
|
||||
// Add row number + 1 for replaceable instructions.
|
||||
for (unsigned i = 0, e = array_lengthof(ReplaceableInstrs); i != e; ++i)
|
||||
for (unsigned c = 0; c != 3; ++c)
|
||||
SSEInstrDomainTable.insert(std::make_pair(ReplaceableInstrs[i][c],
|
||||
c + 4*(i+1)));
|
||||
}
|
||||
|
||||
X86InstrInfo::SSEDomain X86InstrInfo::GetSSEDomain(const MachineInstr *MI,
|
||||
const unsigned *&equiv) const {
|
||||
DenseMap<unsigned,unsigned>::const_iterator i =
|
||||
SSEInstrDomainTable.find(MI->getOpcode());
|
||||
if (i == SSEInstrDomainTable.end())
|
||||
return NotSSEDomain;
|
||||
unsigned value = i->second;
|
||||
if (value/4)
|
||||
equiv = ReplaceableInstrs[value/4 - 1];
|
||||
else
|
||||
equiv = 0;
|
||||
return SSEDomain(value & 3);
|
||||
}
|
||||
@ -41,10 +41,6 @@ FunctionPass *createX86ISelDag(X86TargetMachine &TM,
|
||||
///
|
||||
FunctionPass *createX86FloatingPointStackifierPass();
|
||||
|
||||
/// createSSEDomainFixPass - This pass twiddles SSE opcodes to prevent domain
|
||||
/// crossings.
|
||||
FunctionPass *createSSEDomainFixPass();
|
||||
|
||||
/// createX87FPRegKillInserterPass - This function returns a pass which
|
||||
/// inserts FP_REG_KILL instructions where needed.
|
||||
///
|
||||
|
||||
@ -665,9 +665,6 @@ X86InstrInfo::X86InstrInfo(X86TargetMachine &tm)
|
||||
|
||||
// Remove ambiguous entries.
|
||||
assert(AmbEntries.empty() && "Duplicated entries in unfolding maps?");
|
||||
|
||||
if (TM.getSubtarget<X86Subtarget>().hasSSE2())
|
||||
populateSSEInstrDomainTable();
|
||||
}
|
||||
|
||||
bool X86InstrInfo::isMoveInstr(const MachineInstr& MI,
|
||||
|
||||
@ -486,9 +486,6 @@ class X86InstrInfo : public TargetInstrInfoImpl {
|
||||
/// MemOp2RegOpTable - Load / store unfolding opcode map.
|
||||
///
|
||||
DenseMap<unsigned*, std::pair<unsigned, unsigned> > MemOp2RegOpTable;
|
||||
|
||||
/// SSEInstrDomainTable - Map SSE opcodes to execution domain info.
|
||||
DenseMap<unsigned, unsigned> SSEInstrDomainTable;
|
||||
|
||||
public:
|
||||
explicit X86InstrInfo(X86TargetMachine &tm);
|
||||
@ -719,14 +716,6 @@ public:
|
||||
///
|
||||
unsigned getGlobalBaseReg(MachineFunction *MF) const;
|
||||
|
||||
/// Some SSE instructions come in variants for three domains.
|
||||
enum SSEDomain { PackedInt, PackedSingle, PackedDouble, NotSSEDomain };
|
||||
|
||||
/// GetSSEDomain - Return the SSE execution domain of MI, or NotSSEDomain for
|
||||
/// unknown instructions. If the instruction has equivalents for other domain,
|
||||
/// equiv points to a list of opcodes index by domain.
|
||||
SSEDomain GetSSEDomain(const MachineInstr *MI, const unsigned *&equiv) const;
|
||||
|
||||
private:
|
||||
MachineInstr * convertToThreeAddressWithLEA(unsigned MIOpc,
|
||||
MachineFunction::iterator &MFI,
|
||||
@ -743,9 +732,6 @@ private:
|
||||
/// operand and follow operands form a reference to the stack frame.
|
||||
bool isFrameOperand(const MachineInstr *MI, unsigned int Op,
|
||||
int &FrameIndex) const;
|
||||
|
||||
// Implemented in SSEDomainFix.cpp
|
||||
void populateSSEInstrDomainTable();
|
||||
};
|
||||
|
||||
} // End llvm namespace
|
||||
|
||||
@ -17,17 +17,11 @@
|
||||
#include "llvm/PassManager.h"
|
||||
#include "llvm/CodeGen/MachineFunction.h"
|
||||
#include "llvm/CodeGen/Passes.h"
|
||||
#include "llvm/Support/CommandLine.h"
|
||||
#include "llvm/Support/FormattedStream.h"
|
||||
#include "llvm/Target/TargetOptions.h"
|
||||
#include "llvm/Target/TargetRegistry.h"
|
||||
using namespace llvm;
|
||||
|
||||
static cl::opt<bool>
|
||||
SSEDomainFix("sse-domain-fix",
|
||||
cl::desc("Enable fixing of SSE execution domain"),
|
||||
cl::init(false), cl::Hidden);
|
||||
|
||||
static MCAsmInfo *createMCAsmInfo(const Target &T, StringRef TT) {
|
||||
Triple TheTriple(TT);
|
||||
switch (TheTriple.getOS()) {
|
||||
@ -175,15 +169,6 @@ bool X86TargetMachine::addPostRegAlloc(PassManagerBase &PM,
|
||||
return true; // -print-machineinstr should print after this.
|
||||
}
|
||||
|
||||
bool X86TargetMachine::addPreEmitPass(PassManagerBase &PM,
|
||||
CodeGenOpt::Level OptLevel) {
|
||||
if (SSEDomainFix && OptLevel != CodeGenOpt::None && Subtarget.hasSSE2()) {
|
||||
PM.add(createSSEDomainFixPass());
|
||||
return true;
|
||||
}
|
||||
return false;
|
||||
}
|
||||
|
||||
bool X86TargetMachine::addCodeEmitter(PassManagerBase &PM,
|
||||
CodeGenOpt::Level OptLevel,
|
||||
JITCodeEmitter &JCE) {
|
||||
|
||||
@ -66,7 +66,6 @@ public:
|
||||
virtual bool addInstSelector(PassManagerBase &PM, CodeGenOpt::Level OptLevel);
|
||||
virtual bool addPreRegAlloc(PassManagerBase &PM, CodeGenOpt::Level OptLevel);
|
||||
virtual bool addPostRegAlloc(PassManagerBase &PM, CodeGenOpt::Level OptLevel);
|
||||
virtual bool addPreEmitPass(PassManagerBase &PM, CodeGenOpt::Level OptLevel);
|
||||
virtual bool addCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel,
|
||||
JITCodeEmitter &JCE);
|
||||
};
|
||||
|
||||
Loading…
Reference in New Issue
Block a user