From fe75a2836abd15557cf21a5cc34a7048cbba654f Mon Sep 17 00:00:00 2001 From: Nate Begeman Date: Wed, 31 Aug 2005 00:43:49 +0000 Subject: [PATCH] Sigh, not my day. Fix typo. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23166 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp index aeacfd56884..a44854e9e89 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp @@ -1099,7 +1099,7 @@ static bool MaskedValueIsZero(const SDOperand &Op, uint64_t Mask, return MaskedValueIsZero(Op.getOperand(0),Mask & ((1ULL << SrcBits)-1),TLI); case ISD::AssertZext: SrcBits = MVT::getSizeInBits(cast(Op.getOperand(1))->getVT()); - return (Mask & ((1ULL << SrcBits)-1) == 0; // Returning only the zext bits. + return (Mask & ((1ULL << SrcBits)-1)) == 0; // Returning only the zext bits. case ISD::AND: // (X & C1) & C2 == 0 iff C1 & C2 == 0. if (ConstantSDNode *AndRHS = dyn_cast(Op.getOperand(1)))