Remove obsolete -f flags.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79992 91177308-0d34-0410-b5e6-96231b3b80d8

test/Assembler/2002-01-24-BadSymbolTableAssert.ll

@@ -1,4 +1,4 @@
-; RUN: llvm-as %s -o /dev/null -f
+; RUN: llvm-as %s -o /dev/null
 
 ; This testcase failed due to a bad assertion in SymbolTable.cpp, removed in
 ; the 1.20 revision. Basically the symbol table assumed that if there was an

test/Assembler/2002-01-24-ValueRefineAbsType.ll

@@ -1,4 +1,4 @@
-; RUN: llvm-as %s -o /dev/null -f
+; RUN: llvm-as %s -o /dev/null
 
 ; This testcase used to fail due to a lack of this diff in Value.cpp:
 ; diff -r1.16 Value.cpp

test/Assembler/2002-02-19-TypeParsing.ll

@@ -1,3 +1,3 @@
-; RUN: llvm-as %s -o /dev/null -f
+; RUN: llvm-as %s -o /dev/null
 	
 %Hosp = type { i32, i32, i32, { \2*, { i32, i32, i32, { [4 x \3], \2, \5, %Hosp, i32, i32 }* }*, \2* }, { \2*, { i32, i32, i32, { [4 x \3], \2, \5, %Hosp, i32, i32 }* }*, \2* }, { \2*, { i32, i32, i32, { [4 x \3], \2, \5, %Hosp, i32, i32 }* }*, \2* }, { \2*, { i32, i32, i32, { [4 x \3], \2, \5, %Hosp, i32, i32 }* }*, \2* } }

test/Assembler/2002-03-08-NameCollision.ll

@@ -1,4 +1,4 @@
-; RUN: llvm-as %s -o /dev/null -f
+; RUN: llvm-as %s -o /dev/null
 
 ; Method arguments were being checked for collisions at the global scope before
 ; the method object was created by the parser.  Because of this, false

test/Assembler/2002-03-08-NameCollision2.ll

@@ -1,4 +1,4 @@
-; RUN: llvm-as %s -o /dev/null -f
+; RUN: llvm-as %s -o /dev/null
 
 ; Another name collision problem.  Here the problem was that if a forward
 ; declaration for a method was found, that this would cause spurious conflicts

test/Assembler/2002-04-04-PureVirtMethCall.ll

@@ -1,4 +1,4 @@
-; RUN: llvm-as %s -o /dev/null -f
+; RUN: llvm-as %s -o /dev/null
 
   type { { \2 *, \4 ** },
          { \2 *, \4 ** }

test/Assembler/2002-04-04-PureVirtMethCall2.ll

@@ -1,4 +1,4 @@
-; RUN: llvm-as %s -o /dev/null -f
+; RUN: llvm-as %s -o /dev/null
 
 %t = type { { \2*, \2 },
             { \2*, \2 }

test/Assembler/2002-04-05-TypeParsing.ll

@@ -1,3 +1,3 @@
-; RUN: llvm-as %s -o /dev/null -f
+; RUN: llvm-as %s -o /dev/null
   
  %Hosp = type { { \2*, { \2, %Hosp }* }, { \2*, { \2, %Hosp }* } }

test/Assembler/2002-05-02-InvalidForwardRef.ll

@@ -1,4 +1,4 @@
-; RUN: llvm-as %s -o /dev/null -f
+; RUN: llvm-as %s -o /dev/null
 ; It looks like the assembler is not forward resolving the function declaraion
 ; correctly.
 

test/Assembler/2002-05-02-ParseError.ll

@@ -1,4 +1,4 @@
-; RUN: llvm-as %s -o /dev/null -f
+; RUN: llvm-as %s -o /dev/null
 
 %T = type i32 *
 

test/Assembler/2002-07-08-HugePerformanceProblem.ll

@@ -1,6 +1,6 @@
 ; This file takes about 48 __MINUTES__ to assemble using as.  This is WAY too
 ; long.  The type resolution code needs to be sped up a lot.
-; RUN: llvm-as %s -o /dev/null -f	
+; RUN: llvm-as %s -o /dev/null
 	%ALL_INTERSECTIONS_METHOD = type i32 (%OBJECT*, %RAY*, %ISTACK*)*
 	%BBOX = type { %BBOX_VECT, %BBOX_VECT }
 	%BBOX_TREE = type { i16, i16, %BBOX, %BBOX_TREE** }

test/Assembler/2002-07-25-ParserAssertionFailure.ll

@@ -1,6 +1,6 @@
 ; Make sure we don't get an assertion failure, even though this is a parse 
 ; error
-; RUN: not llvm-as %s -o /dev/null -f |& grep {'@foo' defined with}
+; RUN: not llvm-as %s -o /dev/null |& grep {'@foo' defined with}
 
 %ty = type void (i32)
 

test/Assembler/2002-08-15-CastAmbiguity.ll

@@ -1,4 +1,4 @@
-; RUN: llvm-as %s -o /dev/null -f
+; RUN: llvm-as %s -o /dev/null
 
 define void @test(i32 %X) {
         call void @test( i32 6 )

test/Assembler/2002-08-15-ConstantExprProblem.ll

@@ -1,4 +1,4 @@
-; RUN: llvm-as %s -o /dev/null -f
+; RUN: llvm-as %s -o /dev/null
 
 @.LC0 = internal global [12 x i8] c"hello world\00"             ; <[12 x i8]*> [#uses=1]
 

test/Assembler/2002-08-15-UnresolvedGlobalReference.ll

@@ -1,4 +1,4 @@
-; RUN: llvm-as %s -o /dev/null -f
+; RUN: llvm-as %s -o /dev/null
 
 @.LC0 = internal global [12 x i8] c"hello world\00"             ; <[12 x i8]*> [#uses=1]
 

test/Assembler/2002-08-22-DominanceProblem.ll

@@ -1,4 +1,4 @@
-; RUN: llvm-as %s -o /dev/null -f
+; RUN: llvm-as %s -o /dev/null
 
 ; Dominance relationships is not calculated correctly for unreachable blocks,
 ; which causes the verifier to barf on this input.

test/Assembler/2002-10-08-LargeArrayPerformance.ll

@@ -1,4 +1,4 @@
-; RUN: llvm-as %s -o /dev/null -f
+; RUN: llvm-as %s -o /dev/null
 ; This testcase comes from the following really simple c file:
 ;; int foo[30000]
 ;;; We should not be soo slow for such a simple case!

test/Assembler/2002-10-15-NameClash.ll

@@ -1,4 +1,4 @@
-; RUN: llvm-as %s -o /dev/null -f
+; RUN: llvm-as %s -o /dev/null
 
 declare i32 @"ArrayRef"([100 x i32] * %Array)
 

test/Assembler/2002-12-15-GlobalResolve.ll

@@ -1,4 +1,4 @@
-; RUN: llvm-as %s -o /dev/null -f
+; RUN: llvm-as %s -o /dev/null
 
 @X = external global i32*
 @X1 = external global %T* 

test/Assembler/2003-01-30-UnsignedString.ll

@@ -1,4 +1,4 @@
-; RUN: llvm-as %s -o /dev/null -f
+; RUN: llvm-as %s -o /dev/null
 
 @spell_order = global [4 x i8] c"\FF\00\F7\00"
 

test/Assembler/2003-04-25-UnresolvedGlobalReference.ll

@@ -1,4 +1,4 @@
-; RUN: llvm-as %s -o /dev/null -f
+; RUN: llvm-as %s -o /dev/null
 ; There should be absolutely no problem with this testcase.
 
 define i32 @test(i32 %arg1, i32 %arg2) {

test/Assembler/2003-05-15-AssemblerProblem.ll

@@ -1,6 +1,6 @@
 ; This bug was caused by two CPR's existing for the same global variable, 
 ; colliding in the Module level CPR map.
-; RUN: llvm-as %s -o /dev/null -f
+; RUN: llvm-as %s -o /dev/null
 
 define void @test() {
         call void (...)* bitcast (void (i16*, i32)* @AddString to void (...)*)( i16* null, i32 0 )

test/Assembler/2003-05-15-SwitchBug.ll

@@ -1,4 +1,4 @@
-; RUN: llvm-as %s -o /dev/null -f
+; RUN: llvm-as %s -o /dev/null
 
 ; Check minimal switch statement
 

test/Assembler/2003-05-21-ConstantShiftExpr.ll

@@ -1,4 +1,4 @@
-; RUN: llvm-as %s -o /dev/null -f
+; RUN: llvm-as %s -o /dev/null
 ; Test that shift instructions can be used in constant expressions.
 
 global i32 3670016

test/Assembler/2003-05-21-EmptyStructTest.ll

@@ -1,4 +1,4 @@
-; RUN: llvm-as %s -o /dev/null -f
+; RUN: llvm-as %s -o /dev/null
 
 ; The old C front-end never generated empty structures, now the new one
 ; can.  For some reason we never handled them in the parser. Weird.

test/Assembler/2003-06-30-RecursiveTypeProblem.ll

@@ -1,3 +1,3 @@
-; RUN: llvm-as %s -o /dev/null -f
+; RUN: llvm-as %s -o /dev/null
 
 %MidFnTy = type void (%MidFnTy*)

test/Assembler/2003-10-04-NotMergingGlobalConstants.ll

@@ -1,4 +1,4 @@
-; RUN: llvm-as %s -o /dev/null -f
+; RUN: llvm-as %s -o /dev/null
 
 %T = type i32
 @X = global i32* null           ; <i32**> [#uses=0]

test/Assembler/2003-12-30-TypeMapInvalidMemory.ll

@@ -1,4 +1,4 @@
-; RUN: not llvm-as %s -o /dev/null -f |& grep {use of undefined type named 'struct.D_Scope'}
+; RUN: not llvm-as %s -o /dev/null |& grep {use of undefined type named 'struct.D_Scope'}
 ; END.
 
 @d_reduction_0_dparser_gram = global { 

test/Assembler/2004-02-27-SelfUseAssertError.ll

@@ -1,4 +1,4 @@
-; RUN: llvm-as %s -o /dev/null -f
+; RUN: llvm-as %s -o /dev/null
 
 ; %inc2 uses it's own value, but that's ok, as it's unreachable!
 

test/Assembler/2004-04-04-GetElementPtrIndexTypes.ll

@@ -1,4 +1,4 @@
-; RUN: llvm-as %s -o /dev/null -f
+; RUN: llvm-as %s -o /dev/null
 
 define i32* @t1({ float, i32 }* %X) {
         %W = getelementptr { float, i32 }* %X, i32 20, i32 1            ; <i32*> [#uses=0]

test/Assembler/2004-10-22-BCWriterUndefBug.ll

@@ -1,5 +1,5 @@
 ;; The bytecode writer was trying to treat undef values as ConstantArray's when
 ;; they looked like strings.
-;; RUN: llvm-as %s -o /dev/null -f
+;; RUN: llvm-as %s -o /dev/null
 @G = internal global [8 x i8] undef
 

test/Assembler/2004-11-28-InvalidTypeCrash.ll

@@ -1,4 +1,4 @@
 ; Test for PR463.  This program is erroneous, but should not crash llvm-as.
-; RUN: not llvm-as %s -o /dev/null -f |& grep {invalid type for null constant}
+; RUN: not llvm-as %s -o /dev/null |& grep {invalid type for null constant}
 
 @.FOO  = internal global %struct.none zeroinitializer

test/Assembler/2005-01-31-CallingAggregateFunction.ll

@@ -1,4 +1,4 @@
-; RUN: llvm-as %s -o /dev/null -f 
+; RUN: llvm-as %s -o /dev/null
 
 define void @test() {
 	call {i32} @foo()

test/Assembler/2007-01-02-Undefined-Arg-Type.ll

@@ -1,5 +1,5 @@
 ; The assembler should catch an undefined argument type .
-; RUN: not llvm-as %s -o /dev/null -f |& grep {use of undefined type named 'typedef.bc_struct'}
+; RUN: not llvm-as %s -o /dev/null |& grep {use of undefined type named 'typedef.bc_struct'}
 
 ; %typedef.bc_struct = type opaque
 

test/Assembler/2007-01-05-Cmp-ConstExpr.ll

@@ -1,5 +1,5 @@
 ; Test Case for PR1080
-; RUN: llvm-as %s -o /dev/null -f
+; RUN: llvm-as %s -o /dev/null
 
 @str = internal constant [4 x i8] c"-ga\00"             ; <[4 x i8]*> [#uses=2]
 

test/Assembler/2007-01-16-CrashOnBadCast.ll

@@ -1,5 +1,5 @@
 ; PR1117
-; RUN: not llvm-as %s -o /dev/null -f |& grep {invalid cast opcode for cast from}
+; RUN: not llvm-as %s -o /dev/null |& grep {invalid cast opcode for cast from}
 
 define i8* @nada(i64 %X) {
     %result = trunc i64 %X to i8*

test/Assembler/2007-01-16-CrashOnBadCast2.ll

@@ -1,4 +1,4 @@
 ; PR1117
-; RUN: not llvm-as %s -o /dev/null -f |& grep {invalid cast opcode for cast from}
+; RUN: not llvm-as %s -o /dev/null |& grep {invalid cast opcode for cast from}
 
 @X = constant i8* trunc (i64 0 to i8*)

test/Assembler/2007-03-18-InvalidNumberedVar.ll

@@ -1,5 +1,5 @@
 ; PR 1258
-; RUN: not llvm-as < %s >/dev/null -f |& grep {'%0' defined with type 'i1'}
+; RUN: not llvm-as < %s >/dev/null |& grep {'%0' defined with type 'i1'}
 
 define i32 @test1(i32 %a, i32 %b) {
 entry:

test/Assembler/2008-09-02-FunctionNotes2.ll

@@ -1,5 +1,5 @@
 ; Test function notes
-; RUN: not llvm-as %s -o /dev/null -f |& grep "Attributes noinline alwaysinline are incompatible"
+; RUN: not llvm-as %s -o /dev/null |& grep "Attributes noinline alwaysinline are incompatible"
 define void @fn1() alwaysinline  noinline {
   ret void
 }

test/Assembler/2009-07-24-ZeroArgGEP.ll

@@ -1,4 +1,4 @@
-; RUN: llvm-as %s -o /dev/null -f
+; RUN: llvm-as %s -o /dev/null
 
 @foo = global i32 0
 @bar = constant i32* getelementptr(i32* @foo)

test/Assembler/select.ll

@@ -1,4 +1,4 @@
-; RUN: llvm-as %s -o /dev/null -f
+; RUN: llvm-as %s -o /dev/null
 
 
 define i32 @test(i1 %C, i32 %V1, i32 %V2) {

test/Bitcode/memcpy.ll

@@ -1,4 +1,4 @@
-; RUN: llvm-as %s -o /dev/null -f
+; RUN: llvm-as %s -o /dev/null
 
 define void @test(i32* %P, i32* %Q) {
 entry:

test/Bitcode/metadata-2.ll

@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | llvm-dis -f -o /dev/null
+; RUN: llvm-as < %s | llvm-dis -o /dev/null
 	type { %object.ModuleInfo.__vtbl*, i8*, %"byte[]", %1, %"ClassInfo[]", i32, void ()*, void ()*, void ()*, i8*, void ()* }		; type %0
 	type { i64, %object.ModuleInfo* }		; type %1
 	type { i32, void ()* }		; type %2

test/Bitcode/metadata.ll

@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | llvm-dis -f -o /dev/null
+; RUN: llvm-as < %s | llvm-dis -o /dev/null
 
 !llvm.foo = !{!0}
 !0 = metadata !{i32 42}

test/CodeGen/ARM/aliases.ll

@@ -1,5 +1,5 @@
 ; RUN: llvm-as < %s | \
-; RUN:   llc -mtriple=arm-linux-gnueabi -o %t -f
+; RUN:   llc -mtriple=arm-linux-gnueabi -o %t
 ; RUN: grep set %t   | count 5
 ; RUN: grep globl %t | count 4
 ; RUN: grep weak %t  | count 1

test/CodeGen/Alpha/add.ll

@@ -1,6 +1,6 @@
 ;test all the shifted and signextending adds and subs with and without consts
 ;
-; RUN: llvm-as < %s | llc -march=alpha -o %t.s -f
+; RUN: llvm-as < %s | llc -march=alpha -o %t.s
 ; RUN: grep {	addl} %t.s | count 2
 ; RUN: grep {	addq} %t.s | count 2
 ; RUN: grep {	subl} %t.s | count 2

test/CodeGen/CPP/2009-05-01-Long-Double.ll

@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | llc -march=cpp -cppgen=program -f -o %t
+; RUN: llvm-as < %s | llc -march=cpp -cppgen=program -o %t
 
 define x86_fp80 @some_func() nounwind {
 entry:

test/CodeGen/CPP/2009-05-04-CondBr.ll

@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | llc -march=cpp -cppgen=program -f -o %t
+; RUN: llvm-as < %s | llc -march=cpp -cppgen=program -o %t
 ; RUN: grep "BranchInst::Create(label_if_then, label_if_end, int1_cmp, label_entry);" %t
 
 define i32 @some_func(i32 %a) nounwind {

test/CodeGen/CellSPU/rotate_ops.ll

@@ -1,4 +1,4 @@
-; RUN: llvm-as -o - %s | llc -march=cellspu -f -o %t1.s
+; RUN: llvm-as -o - %s | llc -march=cellspu -o %t1.s
 ; RUN: grep rot          %t1.s | count 85
 ; RUN: grep roth         %t1.s | count 8
 ; RUN: grep roti.*5      %t1.s | count 1

test/CodeGen/Generic/Makefile

@@ -1,10 +1,10 @@
 # Makefile for running ad-hoc custom LLVM tests
 #
 %.bc: %.ll
-	llvm-as -f $< 
+	llvm-as $< 
 	
 %.llc.s: %.bc
-	llc -f $< -o $@ 
+	llc $< -o $@ 
 
 %.gcc.s: %.c
 	gcc -O0 -S $< -o $@

test/CodeGen/Generic/nested-select.ll

@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | llc -o /dev/null -f
+; RUN: llvm-as < %s | llc -o /dev/null
 
 ; Test that select of a select works
 

test/CodeGen/Generic/switch-lower-feature-2.ll

@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | llc -march=x86 -o %t -f
+; RUN: llvm-as < %s | llc -march=x86 -o %t
 ; RUN: grep jb %t | count 1
 ; RUN: grep \\\$6 %t | count 2
 ; RUN: grep 1024 %t | count 1

test/CodeGen/Mips/2008-06-05-Carry.ll

@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | llc -march=mips -f -o %t
+; RUN: llvm-as < %s | llc -march=mips -o %t
 ; RUN: grep subu %t | count 2
 ; RUN: grep addu %t | count 4
 

test/CodeGen/Mips/2008-07-07-IntDoubleConvertions.ll

@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | llc -march=mips -f -o %t
+; RUN: llvm-as < %s | llc -march=mips -o %t
 ; RUN: grep __floatsidf   %t | count 1
 ; RUN: grep __floatunsidf %t | count 1
 ; RUN: grep __fixdfsi %t | count 1

test/CodeGen/Mips/2008-07-15-InternalConstant.ll

@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | llc -march=mips -f -o %t
+; RUN: llvm-as < %s | llc -march=mips -o %t
 ; RUN: grep {rodata.str1.4,"aMS",@progbits}  %t | count 1
 ; RUN: grep {r.data,}  %t | count 1
 ; RUN: grep {\%hi} %t | count 2

test/CodeGen/Mips/2008-07-15-SmallSection.ll

@@ -1,5 +1,5 @@
-; RUN: llvm-as < %s | llc -mips-ssection-threshold=8 -march=mips -f -o %t0
-; RUN: llvm-as < %s | llc -mips-ssection-threshold=0 -march=mips -f -o %t1
+; RUN: llvm-as < %s | llc -mips-ssection-threshold=8 -march=mips -o %t0
+; RUN: llvm-as < %s | llc -mips-ssection-threshold=0 -march=mips -o %t1
 ; RUN: grep {sdata} %t0 | count 1
 ; RUN: grep {sbss} %t0 | count 1
 ; RUN: grep {gp_rel} %t0 | count 2

test/CodeGen/Mips/2008-07-16-SignExtInReg.ll

@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | llc -march=mips -f -o %t
+; RUN: llvm-as < %s | llc -march=mips -o %t
 ; RUN: grep seh %t | count 1
 ; RUN: grep seb %t | count 1
 

test/CodeGen/Mips/2008-07-22-Cstpool.ll

@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | llc -march=mips -f -o %t
+; RUN: llvm-as < %s | llc -march=mips -o %t
 ; RUN: grep {CPI\[01\]_\[01\]:} %t | count 2
 ; RUN: grep {rodata.cst4,"aM",@progbits} %t | count 1
 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"

test/CodeGen/Mips/2008-07-23-fpcmp.ll

@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | llc -march=mips -f -o %t
+; RUN: llvm-as < %s | llc -march=mips -o %t
 ; RUN: grep {c\\..*\\.s} %t | count 3
 ; RUN: grep {bc1\[tf\]} %t | count 3
 

test/CodeGen/Mips/2008-07-31-fcopysign.ll

@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | llc -march=mips -f -o %t
+; RUN: llvm-as < %s | llc -march=mips -o %t
 ; RUN: grep abs.s  %t | count 1
 ; RUN: grep neg.s %t | count 1
 

test/CodeGen/Mips/2008-08-01-AsmInline.ll

@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | llc -march=mips -f -o %t
+; RUN: llvm-as < %s | llc -march=mips -o %t
 ; RUN: grep mfhi  %t | count 1
 ; RUN: grep mflo  %t | count 1
 ; RUN: grep multu %t | count 1

test/CodeGen/Mips/2008-08-03-fabs64.ll

@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | llc -march=mips -f -o %t
+; RUN: llvm-as < %s | llc -march=mips -o %t
 ; RUN: grep {lui.*32767} %t | count 1
 ; RUN: grep {ori.*65535} %t | count 1
 

test/CodeGen/Mips/2008-08-04-Bitconvert.ll

@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | llc -march=mips -f -o %t
+; RUN: llvm-as < %s | llc -march=mips -o %t
 ; RUN: grep mtc1 %t | count 1
 ; RUN: grep mfc1 %t | count 1
 

test/CodeGen/Mips/2008-08-07-CC.ll

@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | llc -march=mips -f 
+; RUN: llvm-as < %s | llc -march=mips
 ; Mips must ignore fastcc
 
 target datalayout =

test/CodeGen/PowerPC/Frames-small.ll

@@ -1,5 +1,5 @@
 ; RUN: llvm-as < %s | \
-; RUN:   llc -march=ppc32 -mtriple=powerpc-apple-darwin8 -o %t1 -f
+; RUN:   llc -march=ppc32 -mtriple=powerpc-apple-darwin8 -o %t1
 ; RUN  not grep {stw r31, 20(r1)} %t1
 ; RUN: grep {stwu r1, -16448(r1)} %t1
 ; RUN: grep {addi r1, r1, 16448} %t1
@@ -7,20 +7,20 @@
 ; RUN: not grep {lwz r31, 20(r1)}
 ; RUN: llvm-as < %s | \
 ; RUN:   llc -march=ppc32 -mtriple=powerpc-apple-darwin8 -disable-fp-elim \
-; RUN:   -o %t2 -f
+; RUN:   -o %t2
 ; RUN: grep {stw r31, 20(r1)} %t2
 ; RUN: grep {stwu r1, -16448(r1)} %t2
 ; RUN: grep {addi r1, r1, 16448} %t2
 ; RUN: grep {lwz r31, 20(r1)} %t2
 ; RUN: llvm-as < %s | \
-; RUN:   llc -march=ppc64 -mtriple=powerpc-apple-darwin8 -o %t3 -f
+; RUN:   llc -march=ppc64 -mtriple=powerpc-apple-darwin8 -o %t3
 ; RUN: not grep {std r31, 40(r1)} %t3
 ; RUN: grep {stdu r1, -16496(r1)} %t3
 ; RUN: grep {addi r1, r1, 16496} %t3
 ; RUN: not grep {ld r31, 40(r1)} %t3
 ; RUN: llvm-as < %s | \
 ; RUN:   llc -march=ppc64 -mtriple=powerpc-apple-darwin8 -disable-fp-elim \
-; RUN:   -o %t4 -f
+; RUN:   -o %t4
 ; RUN: grep {std r31, 40(r1)} %t4
 ; RUN: grep {stdu r1, -16496(r1)} %t4
 ; RUN: grep {addi r1, r1, 16496} %t4

test/CodeGen/PowerPC/addc.ll

@@ -1,5 +1,5 @@
 ; All of these should be codegen'd without loading immediates
-; RUN: llvm-as < %s | llc -march=ppc32 -o %t -f
+; RUN: llvm-as < %s | llc -march=ppc32 -o %t
 ; RUN: grep addc %t | count 1
 ; RUN: grep adde %t | count 1
 ; RUN: grep addze %t | count 1

test/CodeGen/PowerPC/and_add.ll

@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | llc -march=ppc32 -o %t -f
+; RUN: llvm-as < %s | llc -march=ppc32 -o %t
 ; RUN: grep slwi %t
 ; RUN: not grep addi %t
 ; RUN: not grep rlwinm %t

test/CodeGen/PowerPC/mulhs.ll

@@ -1,5 +1,5 @@
 ; All of these ands and shifts should be folded into rlwimi's
-; RUN: llvm-as < %s | llc -march=ppc32 -o %t -f
+; RUN: llvm-as < %s | llc -march=ppc32 -o %t
 ; RUN: not grep mulhwu %t
 ; RUN: not grep srawi %t 
 ; RUN: not grep add %t 

test/CodeGen/PowerPC/rlwimi2.ll

@@ -1,5 +1,5 @@
 ; All of these ands and shifts should be folded into rlwimi's
-; RUN: llvm-as < %s | llc -march=ppc32 -o %t -f
+; RUN: llvm-as < %s | llc -march=ppc32 -o %t
 ; RUN: grep rlwimi %t | count 3
 ; RUN: grep srwi   %t | count 1
 ; RUN: not grep slwi %t

test/CodeGen/PowerPC/rlwinm.ll

@@ -1,5 +1,5 @@
 ; All of these ands and shifts should be folded into rlwimi's
-; RUN: llvm-as < %s | llc -march=ppc32 -o %t -f
+; RUN: llvm-as < %s | llc -march=ppc32 -o %t
 ; RUN: not grep and %t
 ; RUN: not grep srawi %t
 ; RUN: not grep srwi %t

test/CodeGen/PowerPC/rlwinm2.ll

@@ -1,5 +1,5 @@
 ; All of these ands and shifts should be folded into rlw[i]nm instructions
-; RUN: llvm-as < %s | llc -march=ppc32 -o %t -f
+; RUN: llvm-as < %s | llc -march=ppc32 -o %t
 ; RUN: not grep and %t
 ; RUN: not grep srawi %t 
 ; RUN: not grep srwi %t 

test/CodeGen/PowerPC/stfiwx.ll

@@ -1,10 +1,10 @@
 ; RUN: llvm-as < %s | \
-; RUN:   llc -march=ppc32 -mtriple=powerpc-apple-darwin8 -mattr=stfiwx -o %t1 -f
+; RUN:   llc -march=ppc32 -mtriple=powerpc-apple-darwin8 -mattr=stfiwx -o %t1
 ; RUN: grep stfiwx %t1
 ; RUN: not grep r1 %t1
 ; RUN: llvm-as < %s | \
 ; RUN:   llc -march=ppc32 -mtriple=powerpc-apple-darwin8 -mattr=-stfiwx \
-; RUN:   -o %t2 -f
+; RUN:   -o %t2
 ; RUN: not grep stfiwx %t2
 ; RUN: grep r1 %t2
 

test/CodeGen/PowerPC/subc.ll

@@ -1,5 +1,5 @@
 ; All of these should be codegen'd without loading immediates
-; RUN: llvm-as < %s | llc -march=ppc32 -o %t -f
+; RUN: llvm-as < %s | llc -march=ppc32 -o %t
 ; RUN: grep subfc %t | count 1
 ; RUN: grep subfe %t | count 1
 ; RUN: grep subfze %t | count 1

test/CodeGen/PowerPC/vec_br_cmp.ll

@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | llc -march=ppc32 -mcpu=g5 -o %t -f
+; RUN: llvm-as < %s | llc -march=ppc32 -mcpu=g5 -o %t
 ; RUN: grep vcmpeqfp. %t
 ; RUN: not grep mfcr %t
 

test/CodeGen/PowerPC/vec_splat.ll

@@ -1,7 +1,7 @@
 ; Test that vectors are scalarized/lowered correctly.
 ; RUN: llvm-as < %s | llc -march=ppc32 -mcpu=g3 | \
 ; RUN:    grep stfs | count 4
-; RUN: llvm-as < %s | llc -march=ppc32 -mcpu=g5 -o %t -f
+; RUN: llvm-as < %s | llc -march=ppc32 -mcpu=g5 -o %t
 ; RUN: grep vspltw %t | count 2
 ; RUN: grep vsplti %t | count 3
 ; RUN: grep vsplth %t | count 1

test/CodeGen/PowerPC/vec_vrsave.ll

@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | llc -march=ppc32 -mcpu=g5 -o %t -f
+; RUN: llvm-as < %s | llc -march=ppc32 -mcpu=g5 -o %t
 ; RUN: grep vrlw %t
 ; RUN: not grep spr %t
 ; RUN: not grep vrsave %t

test/CodeGen/X86/2009-03-25-TestBug.ll

@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | llc -march=x86 -o %t -f
+; RUN: llvm-as < %s | llc -march=x86 -o %t
 ; RUN: not grep and %t
 ; RUN: not grep shr %t
 ; rdar://6661955

test/CodeGen/X86/2009-06-03-Win64SpillXMM.ll

@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | llc -o %t1 -f
+; RUN: llvm-as < %s | llc -o %t1
 ; RUN: grep "subq.*\\\$72, \\\%rsp" %t1
 ; RUN: grep "movaps	\\\%xmm8, 32\\\(\\\%rsp\\\)" %t1
 ; RUN: grep "movaps	\\\%xmm7, 48\\\(\\\%rsp\\\)" %t1

test/CodeGen/X86/aliases.ll

@@ -1,5 +1,5 @@
 ; RUN: llvm-as < %s | \
-; RUN:   llc -mtriple=i686-pc-linux-gnu -asm-verbose=false -o %t -f
+; RUN:   llc -mtriple=i686-pc-linux-gnu -asm-verbose=false -o %t
 ; RUN: grep set %t   | count 7
 ; RUN: grep globl %t | count 6
 ; RUN: grep weak %t  | count 1

test/CodeGen/X86/atomic_op.ll

@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | llc -march=x86 -o %t1 -f
+; RUN: llvm-as < %s | llc -march=x86 -o %t1
 ; RUN: grep "lock" %t1 | count 17
 ; RUN: grep "xaddl" %t1 | count 4 
 ; RUN: grep "cmpxchgl"  %t1 | count 13 

test/CodeGen/X86/convert-2-addr-3-addr-inc64.ll

@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | llc -march=x86-64 -o %t -f -stats -info-output-file - | \
+; RUN: llvm-as < %s | llc -march=x86-64 -o %t -stats -info-output-file - | \
 ; RUN:   grep {asm-printer} | grep {Number of machine instrs printed} | grep 5
 ; RUN: grep {leal	1(\%rsi),} %t
 

test/CodeGen/X86/dagcombine-buildvector.ll

@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | llc -march=x86 -mcpu=penryn -disable-mmx -o %t -f
+; RUN: llvm-as < %s | llc -march=x86 -mcpu=penryn -disable-mmx -o %t
 ; RUN: grep unpcklpd %t | count 1
 ; RUN: grep movapd %t | count 1
 ; RUN: grep movaps %t | count 1

test/CodeGen/X86/extract-combine.ll

@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | llc -march=x86-64 -mcpu=core2 -o %t -f
+; RUN: llvm-as < %s | llc -march=x86-64 -mcpu=core2 -o %t
 ; RUN: not grep unpcklps %t
 
 define i32 @foo() nounwind {

test/CodeGen/X86/iv-users-in-other-loops.ll

@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | llc -march=x86-64 -f -o %t
+; RUN: llvm-as < %s | llc -march=x86-64 -o %t
 ; RUN: grep inc %t | count 1
 ; RUN: grep dec %t | count 2
 ; RUN: grep addq %t | count 13

test/CodeGen/X86/legalizedag_vec.ll

@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | llc -march=x86 -mattr=sse2 -disable-mmx -o %t -f
+; RUN: llvm-as < %s | llc -march=x86 -mattr=sse2 -disable-mmx -o %t
 ; RUN: grep {call.*divdi3}  %t | count 2
 
 

test/CodeGen/X86/mingw-alloca.ll

@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | llc -o %t -f
+; RUN: llvm-as < %s | llc -o %t
 ; RUN: grep __alloca %t | count 2
 ; RUN: grep 4294967288 %t
 ; RUN: grep {pushl	%eax} %t

test/CodeGen/X86/neg_fp.ll

@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse41 -o %t -f
+; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse41 -o %t
 ; RUN: grep xorps %t | count 1
 
 ; Test that when we don't -enable-unsafe-fp-math, we don't do the optimization
@@ -9,4 +9,4 @@ entry:
 	%sub = fsub float %a, %b		; <float> [#uses=1]
 	%neg = fsub float -0.000000e+00, %sub		; <float> [#uses=1]
 	ret float %neg
-}
+}

test/CodeGen/X86/pic-1.ll

@@ -1,5 +1,5 @@
 ; RUN: llvm-as < %s | \
-; RUN:   llc -mtriple=i686-pc-linux-gnu -relocation-model=pic -o %t -f
+; RUN:   llc -mtriple=i686-pc-linux-gnu -relocation-model=pic -o %t
 ; RUN: grep _GLOBAL_OFFSET_TABLE_ %t
 ; RUN: grep piclabel %t | count 3
 ; RUN: grep GOT %t | count 3

test/CodeGen/X86/pic-2.ll

@@ -1,5 +1,5 @@
 ; RUN: llvm-as < %s | llc -mtriple=i686-pc-linux-gnu -relocation-model=pic \
-; RUN:   -o %t -f
+; RUN:   -o %t
 ; RUN: grep _GLOBAL_OFFSET_TABLE_ %t
 ; RUN: grep piclabel %t | count 3
 ; RUN: grep GOTOFF %t | count 4

test/CodeGen/X86/pic-4.ll

@@ -1,5 +1,5 @@
 ; RUN: llvm-as < %s | \
-; RUN:   llc -mtriple=i686-pc-linux-gnu -relocation-model=pic -o %t -f 
+; RUN:   llc -mtriple=i686-pc-linux-gnu -relocation-model=pic -o %t
 ; RUN: grep _GLOBAL_OFFSET_TABLE_ %t
 ; RUN: grep piclabel %t | count 3
 ; RUN: grep PLT %t | count 1

test/CodeGen/X86/pic-5.ll

@@ -1,5 +1,5 @@
 ; RUN: llvm-as < %s | llc -mtriple=i686-pc-linux-gnu -relocation-model=pic \
-; RUN:   -o %t -f
+; RUN:   -o %t
 ; RUN: grep _GLOBAL_OFFSET_TABLE_ %t
 ; RUN: grep piclabel %t | count 3
 ; RUN: grep PLT %t | count 1

test/CodeGen/X86/pic-6.ll

@@ -1,5 +1,5 @@
 ; RUN: llvm-as < %s | llc -mtriple=i686-pc-linux-gnu -relocation-model=pic \
-; RUN:   -o %t -f
+; RUN:   -o %t
 ; RUN:  grep _GLOBAL_OFFSET_TABLE_ %t
 ; RUN: grep piclabel %t | count 3
 ; RUN: grep GOT %t | count 3

test/CodeGen/X86/pic-cpool.ll

@@ -1,5 +1,5 @@
 ; RUN: llvm-as < %s | llc -mtriple=i686-pc-linux-gnu -relocation-model=pic \
-; RUN:   -o %t -f
+; RUN:   -o %t
 ; RUN: grep _GLOBAL_OFFSET_TABLE_ %t
 ; RUN: grep piclabel %t | count 3
 ; RUN: grep GOTOFF %t | count 1

test/CodeGen/X86/pic-jtbl.ll

@@ -1,5 +1,5 @@
 ; RUN: llvm-as < %s | llc -mtriple=i686-pc-linux-gnu -relocation-model=pic \
-; RUN:   -o %t -f
+; RUN:   -o %t
 ; RUN: grep _GLOBAL_OFFSET_TABLE_ %t
 ; RUN: grep piclabel %t | count 3
 ; RUN: grep PLT %t | count 6

test/CodeGen/X86/scalar-extract.ll

@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+mmx -o %t -f
+; RUN: llvm-as < %s | llc -march=x86 -mattr=+mmx -o %t
 ; RUN: not grep movq  %t
 
 ; Check that widening doesn't introduce a mmx register in this case when

test/CodeGen/X86/vec_clear.ll

@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -mtriple=i386-apple-darwin -o %t -f
+; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -mtriple=i386-apple-darwin -o %t
 ; RUN: not grep and %t
 ; RUN: not grep psrldq %t
 ; RUN: grep xorps %t

test/CodeGen/X86/vec_extract-sse4.ll

@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse41 -o %t -f
+; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse41 -o %t
 ; RUN: grep extractps   %t | count 1
 ; RUN: grep pextrd      %t | count 1
 ; RUN: not grep pshufd  %t

test/CodeGen/X86/vec_extract.ll

@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2,-sse41 -o %t -f
+; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2,-sse41 -o %t
 ; RUN: grep movss    %t | count 3
 ; RUN: grep movhlps  %t | count 1
 ; RUN: grep pshufd   %t | count 1

test/CodeGen/X86/vec_i64.ll

@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -o %t -f
+; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -o %t
 ; RUN: grep movq %t | count 2
 
 ; Used movq to load i64 into a v2i64 when the top i64 is 0.

test/CodeGen/X86/vec_insert-8.ll

@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse41 -o %t -f
+; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse41 -o %t
 
 ; tests variable insert and extract of a 4 x i32