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Remove unused BitVectors from getAllocatableSet().

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165999 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jakob Stoklund Olesen 2012-10-16 00:05:06 +00:00
parent 88bcf797ab
commit feab72c20a
3 changed files with 1 additions and 9 deletions
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3
lib/CodeGen/MachineCSE.cpp
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@ -63,7 +63,6 @@ namespace {
virtual void releaseMemory() { virtual void releaseMemory() {
ScopeMap.clear(); ScopeMap.clear();
Exps.clear(); Exps.clear();
AllocatableRegs.clear();
} }
private: private:
@ -77,7 +76,6 @@ namespace {
ScopedHTType VNT; ScopedHTType VNT;
SmallVector<MachineInstr*, 64> Exps; SmallVector<MachineInstr*, 64> Exps;
unsigned CurrVN; unsigned CurrVN;
BitVector AllocatableRegs;
bool PerformTrivialCoalescing(MachineInstr *MI, MachineBasicBlock *MBB); bool PerformTrivialCoalescing(MachineInstr *MI, MachineBasicBlock *MBB);
bool isPhysDefTriviallyDead(unsigned Reg, bool isPhysDefTriviallyDead(unsigned Reg,
@ -633,6 +631,5 @@ bool MachineCSE::runOnMachineFunction(MachineFunction &MF) {
MRI = &MF.getRegInfo(); MRI = &MF.getRegInfo();
AA = &getAnalysis<AliasAnalysis>(); AA = &getAnalysis<AliasAnalysis>();
DT = &getAnalysis<MachineDominatorTree>(); DT = &getAnalysis<MachineDominatorTree>();
AllocatableRegs = TRI->getAllocatableSet(MF);
return PerformCSE(DT->getRootNode()); return PerformCSE(DT->getRootNode());
} }

2
lib/CodeGen/MachineSink.cpp
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@ -49,7 +49,6 @@ namespace {
MachineDominatorTree *DT; // Machine dominator tree MachineDominatorTree *DT; // Machine dominator tree
MachineLoopInfo *LI; MachineLoopInfo *LI;
AliasAnalysis *AA; AliasAnalysis *AA;
BitVector AllocatableSet; // Which physregs are allocatable?
// Remember which edges have been considered for breaking. // Remember which edges have been considered for breaking.
SmallSet<std::pair<MachineBasicBlock*,MachineBasicBlock*>, 8> SmallSet<std::pair<MachineBasicBlock*,MachineBasicBlock*>, 8>
@ -229,7 +228,6 @@ bool MachineSinking::runOnMachineFunction(MachineFunction &MF) {
DT = &getAnalysis<MachineDominatorTree>(); DT = &getAnalysis<MachineDominatorTree>();
LI = &getAnalysis<MachineLoopInfo>(); LI = &getAnalysis<MachineLoopInfo>();
AA = &getAnalysis<AliasAnalysis>(); AA = &getAnalysis<AliasAnalysis>();
AllocatableSet = TRI->getAllocatableSet(MF);
bool EverMadeChange = false; bool EverMadeChange = false;

5
lib/CodeGen/MachineVerifier.cpp
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@ -80,7 +80,6 @@ namespace {
BlockSet FunctionBlocks; BlockSet FunctionBlocks;
BitVector regsReserved; BitVector regsReserved;
BitVector regsAllocatable;
RegSet regsLive; RegSet regsLive;
RegVector regsDefined, regsDead, regsKilled; RegVector regsDefined, regsDead, regsKilled;
RegMaskVector regMasks; RegMaskVector regMasks;
@ -186,7 +185,7 @@ namespace {
} }
bool isAllocatable(unsigned Reg) { bool isAllocatable(unsigned Reg) {
return Reg < regsAllocatable.size() && regsAllocatable.test(Reg); return Reg < TRI->getNumRegs() && MRI->isAllocatable(Reg);
} }
// Analysis information if available // Analysis information if available
@ -439,8 +438,6 @@ void MachineVerifier::visitMachineFunctionBefore() {
} }
} }
regsAllocatable = TRI->getAllocatableSet(*MF);
markReachable(&MF->front()); markReachable(&MF->front());
// Build a set of the basic blocks in the function. // Build a set of the basic blocks in the function.