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Fix a bunch of ARM tests to be register allocation independent.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130800 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jakob Stoklund Olesen
2011-05-03 22:31:21 +00:00
parent 4dfdf242c1
commit feaf34758a
8 changed files with 30 additions and 30 deletions
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test/CodeGen/ARM/2011-04-07-schediv.ll
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@@ -13,6 +13,7 @@ entry:
; Make sure the scheduler schedules all uses of the preincrement
; induction variable before defining the postincrement value.
; CHECK: t:
; CHECK: %bb
; CHECK-NOT: mov
bb: ; preds = %entry, %bb
%j.05 = phi i32 [ %2, %bb ], [ 0, %entry ]