6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-06-12 13:38:21 +00:00
Code Issues Projects Releases Wiki Activity

Trim debugging output.

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125802 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jakob Stoklund Olesen
2011-02-18 00:32:47 +00:00
parent 97755a063e
commit febb0bd0b9
2 changed files with 6 additions and 29 deletions
Download Patch File Download Diff File Expand all files Collapse all files

10
lib/CodeGen/RegAllocBasic.cpp
View File

@ -244,6 +244,8 @@ seedLiveVirtRegs(std::priority_queue<std::pair<float, unsigned> > &VirtRegQ) {
}
void RegAllocBase::assign(LiveInterval &VirtReg, unsigned PhysReg) {
DEBUG(dbgs() << "assigning " << PrintReg(VirtReg.reg, TRI)
<< " to " << PrintReg(PhysReg, TRI) << '\n');
assert(!VRM->hasPhys(VirtReg.reg) && "Duplicate VirtReg assignment");
VRM->assignVirt2Phys(VirtReg.reg, PhysReg);
PhysReg2LiveUnion[PhysReg].unify(VirtReg);
@ -251,6 +253,8 @@ void RegAllocBase::assign(LiveInterval &VirtReg, unsigned PhysReg) {
}
void RegAllocBase::unassign(LiveInterval &VirtReg, unsigned PhysReg) {
DEBUG(dbgs() << "unassigning " << PrintReg(VirtReg.reg, TRI)
<< " from " << PrintReg(PhysReg, TRI) << '\n');
assert(VRM->getPhys(VirtReg.reg) == PhysReg && "Inconsistent unassign");
PhysReg2LiveUnion[PhysReg].extract(VirtReg);
VRM->clearVirt(VirtReg.reg);
@ -280,11 +284,9 @@ void RegAllocBase::allocatePhysRegs() {
VirtRegVec SplitVRegs;
unsigned AvailablePhysReg = selectOrSplit(VirtReg, SplitVRegs);
if (AvailablePhysReg) {
DEBUG(dbgs() << "allocating: " << TRI->getName(AvailablePhysReg)
<< " for " << VirtReg << '\n');
if (AvailablePhysReg)
assign(VirtReg, AvailablePhysReg);
}
for (VirtRegVec::iterator I = SplitVRegs.begin(), E = SplitVRegs.end();
I != E; ++I) {
LiveInterval* SplitVirtReg = *I;