Remove PPCScoreboardHazardRecognizer

PPCScoreboardHazardRecognizer was a subclass of ScoreboardHazardRecognizer
which did only one thing: filtered out nodes in EmitInstruction for which
DAG->getInstrDesc(SU) returned NULL. This used to be the case for PPC pseudo
instructions. As far as I can tell, this is no longer true, and so we can use
ScoreboardHazardRecognizer directly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196171 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Hal Finkel 2013-12-02 23:52:46 +00:00
parent 9472fd7403
commit ff40d5e6d4
3 changed files with 2 additions and 41 deletions

View File

@ -21,30 +21,6 @@
#include "llvm/Support/raw_ostream.h"
using namespace llvm;
//===----------------------------------------------------------------------===//
// PowerPC Scoreboard Hazard Recognizer
void PPCScoreboardHazardRecognizer::EmitInstruction(SUnit *SU) {
const MCInstrDesc *MCID = DAG->getInstrDesc(SU);
if (!MCID)
// This is a PPC pseudo-instruction.
return;
ScoreboardHazardRecognizer::EmitInstruction(SU);
}
ScheduleHazardRecognizer::HazardType
PPCScoreboardHazardRecognizer::getHazardType(SUnit *SU, int Stalls) {
return ScoreboardHazardRecognizer::getHazardType(SU, Stalls);
}
void PPCScoreboardHazardRecognizer::AdvanceCycle() {
ScoreboardHazardRecognizer::AdvanceCycle();
}
void PPCScoreboardHazardRecognizer::Reset() {
ScoreboardHazardRecognizer::Reset();
}
//===----------------------------------------------------------------------===//
// PowerPC 970 Hazard Recognizer
//

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@ -21,21 +21,6 @@
namespace llvm {
/// PPCScoreboardHazardRecognizer - This class implements a scoreboard-based
/// hazard recognizer for generic PPC processors.
class PPCScoreboardHazardRecognizer : public ScoreboardHazardRecognizer {
const ScheduleDAG *DAG;
public:
PPCScoreboardHazardRecognizer(const InstrItineraryData *ItinData,
const ScheduleDAG *DAG_) :
ScoreboardHazardRecognizer(ItinData, DAG_), DAG(DAG_) {}
virtual HazardType getHazardType(SUnit *SU, int Stalls);
virtual void EmitInstruction(SUnit *SU);
virtual void AdvanceCycle();
virtual void Reset();
};
/// PPCHazardRecognizer970 - This class defines a finite state automata that
/// models the dispatch logic on the PowerPC 970 (aka G5) processor. This
/// promotes good dispatch group formation and implements noop insertion to

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@ -61,7 +61,7 @@ ScheduleHazardRecognizer *PPCInstrInfo::CreateTargetHazardRecognizer(
if (Directive == PPC::DIR_440 || Directive == PPC::DIR_A2 ||
Directive == PPC::DIR_E500mc || Directive == PPC::DIR_E5500) {
const InstrItineraryData *II = TM->getInstrItineraryData();
return new PPCScoreboardHazardRecognizer(II, DAG);
return new ScoreboardHazardRecognizer(II, DAG);
}
return TargetInstrInfo::CreateTargetHazardRecognizer(TM, DAG);
@ -82,7 +82,7 @@ ScheduleHazardRecognizer *PPCInstrInfo::CreateTargetPostRAHazardRecognizer(
return new PPCHazardRecognizer970(TM);
}
return new PPCScoreboardHazardRecognizer(II, DAG);
return new ScoreboardHazardRecognizer(II, DAG);
}
// Detect 32 -> 64-bit extensions where we may reuse the low sub-register.