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Use SDValue bool operator to reduce code. No functional change.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218314 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Sanjay Patel 2014-09-23 16:24:20 +00:00
parent abe1cb7985
commit ff5cfb4c23
1 changed files with 6 additions and 9 deletions
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15
lib/CodeGen/SelectionDAG/DAGCombiner.cpp
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@ -11712,27 +11712,24 @@ SDValue DAGCombiner::BuildRSQRTE(SDNode *N) {
SDValue N1 = N->getOperand(1);
if (N1.getOpcode() == ISD::FSQRT) {
SDValue RV = TLI.BuildRSQRTE(N1.getOperand(0), DCI);
if (RV.getNode()) {
DCI.AddToWorklist(RV.getNode());
if (SDValue RV = TLI.BuildRSQRTE(N1.getOperand(0), DCI)) {
AddToWorklist(RV.getNode());
return DAG.getNode(ISD::FMUL, DL, VT, N->getOperand(0), RV);
}
} else if (N1.getOpcode() == ISD::FP_EXTEND &&
N1.getOperand(0).getOpcode() == ISD::FSQRT) {
SDValue RV = TLI.BuildRSQRTE(N1.getOperand(0).getOperand(0), DCI);
if (RV.getNode()) {
if (SDValue RV = TLI.BuildRSQRTE(N1.getOperand(0).getOperand(0), DCI)) {
DCI.AddToWorklist(RV.getNode());
RV = DAG.getNode(ISD::FP_EXTEND, SDLoc(N1), VT, RV);
DCI.AddToWorklist(RV.getNode());
AddToWorklist(RV.getNode());
return DAG.getNode(ISD::FMUL, DL, VT, N->getOperand(0), RV);
}
} else if (N1.getOpcode() == ISD::FP_ROUND &&
N1.getOperand(0).getOpcode() == ISD::FSQRT) {
SDValue RV = TLI.BuildRSQRTE(N1.getOperand(0).getOperand(0), DCI);
if (RV.getNode()) {
if (SDValue RV = TLI.BuildRSQRTE(N1.getOperand(0).getOperand(0), DCI)) {
DCI.AddToWorklist(RV.getNode());
RV = DAG.getNode(ISD::FP_ROUND, SDLoc(N1), VT, RV, N1.getOperand(1));
DCI.AddToWorklist(RV.getNode());
AddToWorklist(RV.getNode());
return DAG.getNode(ISD::FMUL, DL, VT, N->getOperand(0), RV);
}
}