6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-04-04 10:30:01 +00:00
Code Issues Projects Releases Wiki Activity

[mips] In the integrated assembler, select the default feature bits by changing the CPU value.

Browse Source 
This is consistent with the way CodeGen acheives this. However, CodeGen
always selects mips32 (even when the architecture is mips64).



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201694 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Daniel Sanders 2014-02-19 16:13:26 +00:00
parent f47b32ed76
commit ffac49bd7f
1 changed files with 8 additions and 27 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

35
lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp
View File

@ -39,27 +39,6 @@
using namespace llvm;
static std::string ParseMipsTriple(StringRef TT, StringRef CPU) {
std::string MipsArchFeature;
Triple TheTriple(TT);
if (TheTriple.getArch() == Triple::mips ||
TheTriple.getArch() == Triple::mipsel) {
if (CPU.empty() || CPU == "mips32") {
MipsArchFeature = "+mips32";
} else if (CPU == "mips32r2") {
MipsArchFeature = "+mips32r2";
}
} else {
if (CPU.empty() || CPU == "mips64") {
MipsArchFeature = "+mips64";
} else if (CPU == "mips64r2") {
MipsArchFeature = "+mips64r2";
}
}
return MipsArchFeature;
}
static MCInstrInfo *createMipsMCInstrInfo() {
MCInstrInfo *X = new MCInstrInfo();
InitMipsMCInstrInfo(X);
@ -74,15 +53,17 @@ static MCRegisterInfo *createMipsMCRegisterInfo(StringRef TT) {
static MCSubtargetInfo *createMipsMCSubtargetInfo(StringRef TT, StringRef CPU,
StringRef FS) {
std::string ArchFS = ParseMipsTriple(TT,CPU);
if (!FS.empty()) {
if (!ArchFS.empty())
ArchFS = ArchFS + "," + FS.str();
if (CPU.empty()) {
Triple TheTriple(TT);
// FIXME: CodeGen picks mips32 in both cases.
if (TheTriple.getArch() == Triple::mips ||
TheTriple.getArch() == Triple::mipsel)
CPU = "mips32";
else
ArchFS = FS;
CPU = "mips64";
}
MCSubtargetInfo *X = new MCSubtargetInfo();
InitMipsMCSubtargetInfo(X, TT, CPU, ArchFS);
InitMipsMCSubtargetInfo(X, TT, CPU, FS);
return X;
}