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Code Issues Projects Releases Wiki Activity

Clean up redundant copies of Triple objects. NFC

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Summary:

Reviewers: rengolin

Reviewed By: rengolin

Subscribers: llvm-commits, rengolin, jholewinski

Differential Revision: http://reviews.llvm.org/D10382


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239823 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Daniel Sanders
2015-06-16 15:44:21 +00:00
parent 8a8bb45a76
commit ffb22b8d80
29 changed files with 54 additions and 58 deletions
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11
lib/Target/PowerPC/PPCTargetMachine.cpp
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@@ -171,7 +171,7 @@ PPCTargetMachine::PPCTargetMachine(const Target &T, const Triple &TT,
CodeGenOpt::Level OL)
: LLVMTargetMachine(T, getDataLayoutString(TT), TT, CPU,
computeFSAdditions(FS, OL, TT), Options, RM, CM, OL),
TLOF(createTLOF(Triple(getTargetTriple()))),
TLOF(createTLOF(getTargetTriple())),
TargetABI(computeTargetABI(TT, Options)) {
initAsmInfo();
}
@@ -215,7 +215,7 @@ PPCTargetMachine::getSubtargetImpl(const Function &F) const {
// function that reside in TargetOptions.
resetTargetOptions(F);
I = llvm::make_unique<PPCSubtarget>(
Triple(TargetTriple), CPU,
TargetTriple, CPU,
// FIXME: It would be good to have the subtarget additions here
// not necessary. Anything that turns them on/off (overrides) ends
// up being put at the end of the feature string, but the defaults
@@ -262,9 +262,8 @@ void PPCPassConfig::addIRPasses() {
// For the BG/Q (or if explicitly requested), add explicit data prefetch
// intrinsics.
bool UsePrefetching =
Triple(TM->getTargetTriple()).getVendor() == Triple::BGQ &&
getOptLevel() != CodeGenOpt::None;
bool UsePrefetching = TM->getTargetTriple().getVendor() == Triple::BGQ &&
getOptLevel() != CodeGenOpt::None;
if (EnablePrefetch.getNumOccurrences() > 0)
UsePrefetching = EnablePrefetch;
if (UsePrefetching)
@@ -318,7 +317,7 @@ void PPCPassConfig::addMachineSSAOptimization() {
TargetPassConfig::addMachineSSAOptimization();
// For little endian, remove where possible the vector swap instructions
// introduced at code generation to normalize vector element order.
if (Triple(TM->getTargetTriple()).getArch() == Triple::ppc64le &&
if (TM->getTargetTriple().getArch() == Triple::ppc64le &&
!DisableVSXSwapRemoval)
addPass(createPPCVSXSwapRemovalPass());
}