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Don't leave Base.FrameIndex uninitialized, so that it doesn't
print randomly in debug output. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102668 91177308-0d34-0410-b5e6-96231b3b80d8
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c799c55a33
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@ -55,10 +55,9 @@ namespace {
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FrameIndexBase
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} BaseType;
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struct { // This is really a union, discriminated by BaseType!
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SDValue Reg;
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int FrameIndex;
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} Base;
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// This is really a union, discriminated by BaseType!
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SDValue Base_Reg;
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int Base_FrameIndex;
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unsigned Scale;
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SDValue IndexReg;
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@ -73,7 +72,7 @@ namespace {
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unsigned char SymbolFlags; // X86II::MO_*
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X86ISelAddressMode()
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: BaseType(RegBase), Scale(1), IndexReg(), Disp(0),
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: BaseType(RegBase), Base_FrameIndex(0), Scale(1), IndexReg(), Disp(0),
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Segment(), GV(0), CP(0), BlockAddr(0), ES(0), JT(-1), Align(0),
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SymbolFlags(X86II::MO_NO_FLAG) {
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}
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@ -83,7 +82,7 @@ namespace {
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}
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bool hasBaseOrIndexReg() const {
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return IndexReg.getNode() != 0 || Base.Reg.getNode() != 0;
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return IndexReg.getNode() != 0 || Base_Reg.getNode() != 0;
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}
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/// isRIPRelative - Return true if this addressing mode is already RIP
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@ -91,24 +90,24 @@ namespace {
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bool isRIPRelative() const {
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if (BaseType != RegBase) return false;
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if (RegisterSDNode *RegNode =
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dyn_cast_or_null<RegisterSDNode>(Base.Reg.getNode()))
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dyn_cast_or_null<RegisterSDNode>(Base_Reg.getNode()))
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return RegNode->getReg() == X86::RIP;
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return false;
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}
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void setBaseReg(SDValue Reg) {
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BaseType = RegBase;
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Base.Reg = Reg;
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Base_Reg = Reg;
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}
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void dump() {
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dbgs() << "X86ISelAddressMode " << this << '\n';
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dbgs() << "Base.Reg ";
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if (Base.Reg.getNode() != 0)
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Base.Reg.getNode()->dump();
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dbgs() << "Base_Reg ";
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if (Base_Reg.getNode() != 0)
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Base_Reg.getNode()->dump();
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else
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dbgs() << "nul";
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dbgs() << " Base.FrameIndex " << Base.FrameIndex << '\n'
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dbgs() << " Base.FrameIndex " << Base_FrameIndex << '\n'
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<< " Scale" << Scale << '\n'
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<< "IndexReg ";
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if (IndexReg.getNode() != 0)
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@ -233,8 +232,8 @@ namespace {
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SDValue &Scale, SDValue &Index,
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SDValue &Disp, SDValue &Segment) {
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Base = (AM.BaseType == X86ISelAddressMode::FrameIndexBase) ?
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CurDAG->getTargetFrameIndex(AM.Base.FrameIndex, TLI.getPointerTy()) :
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AM.Base.Reg;
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CurDAG->getTargetFrameIndex(AM.Base_FrameIndex, TLI.getPointerTy()) :
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AM.Base_Reg;
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Scale = getI8Imm(AM.Scale);
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Index = AM.IndexReg;
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// These are 32-bit even in 64-bit mode since RIP relative offset
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@ -673,8 +672,8 @@ bool X86DAGToDAGISel::MatchAddress(SDValue N, X86ISelAddressMode &AM) {
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// a smaller encoding and avoids a scaled-index.
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if (AM.Scale == 2 &&
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AM.BaseType == X86ISelAddressMode::RegBase &&
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AM.Base.Reg.getNode() == 0) {
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AM.Base.Reg = AM.IndexReg;
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AM.Base_Reg.getNode() == 0) {
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AM.Base_Reg = AM.IndexReg;
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AM.Scale = 1;
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}
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@ -685,11 +684,11 @@ bool X86DAGToDAGISel::MatchAddress(SDValue N, X86ISelAddressMode &AM) {
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Subtarget->is64Bit() &&
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AM.Scale == 1 &&
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AM.BaseType == X86ISelAddressMode::RegBase &&
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AM.Base.Reg.getNode() == 0 &&
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AM.Base_Reg.getNode() == 0 &&
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AM.IndexReg.getNode() == 0 &&
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AM.SymbolFlags == X86II::MO_NO_FLAG &&
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AM.hasSymbolicDisplacement())
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AM.Base.Reg = CurDAG->getRegister(X86::RIP, MVT::i64);
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AM.Base_Reg = CurDAG->getRegister(X86::RIP, MVT::i64);
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return false;
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}
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@ -779,9 +778,9 @@ bool X86DAGToDAGISel::MatchAddressRecursively(SDValue N, X86ISelAddressMode &AM,
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case ISD::FrameIndex:
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if (AM.BaseType == X86ISelAddressMode::RegBase
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&& AM.Base.Reg.getNode() == 0) {
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&& AM.Base_Reg.getNode() == 0) {
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AM.BaseType = X86ISelAddressMode::FrameIndexBase;
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AM.Base.FrameIndex = cast<FrameIndexSDNode>(N)->getIndex();
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AM.Base_FrameIndex = cast<FrameIndexSDNode>(N)->getIndex();
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return false;
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}
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break;
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@ -832,7 +831,7 @@ bool X86DAGToDAGISel::MatchAddressRecursively(SDValue N, X86ISelAddressMode &AM,
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case X86ISD::MUL_IMM:
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// X*[3,5,9] -> X+X*[2,4,8]
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if (AM.BaseType == X86ISelAddressMode::RegBase &&
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AM.Base.Reg.getNode() == 0 &&
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AM.Base_Reg.getNode() == 0 &&
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AM.IndexReg.getNode() == 0) {
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if (ConstantSDNode
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*CN = dyn_cast<ConstantSDNode>(N.getNode()->getOperand(1)))
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@ -863,7 +862,7 @@ bool X86DAGToDAGISel::MatchAddressRecursively(SDValue N, X86ISelAddressMode &AM,
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Reg = N.getNode()->getOperand(0);
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}
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AM.IndexReg = AM.Base.Reg = Reg;
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AM.IndexReg = AM.Base_Reg = Reg;
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return false;
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}
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}
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@ -908,8 +907,8 @@ bool X86DAGToDAGISel::MatchAddressRecursively(SDValue N, X86ISelAddressMode &AM,
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// If the base is a register with multiple uses, this
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// transformation may save a mov.
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if ((AM.BaseType == X86ISelAddressMode::RegBase &&
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AM.Base.Reg.getNode() &&
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!AM.Base.Reg.getNode()->hasOneUse()) ||
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AM.Base_Reg.getNode() &&
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!AM.Base_Reg.getNode()->hasOneUse()) ||
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AM.BaseType == X86ISelAddressMode::FrameIndexBase)
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--Cost;
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// If the folded LHS was interesting, this transformation saves
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@ -979,9 +978,9 @@ bool X86DAGToDAGISel::MatchAddressRecursively(SDValue N, X86ISelAddressMode &AM,
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// see if we can just put each operand into a register and fold at least
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// the add.
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if (AM.BaseType == X86ISelAddressMode::RegBase &&
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!AM.Base.Reg.getNode() &&
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!AM.Base_Reg.getNode() &&
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!AM.IndexReg.getNode()) {
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AM.Base.Reg = N.getNode()->getOperand(0);
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AM.Base_Reg = N.getNode()->getOperand(0);
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AM.IndexReg = N.getNode()->getOperand(1);
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AM.Scale = 1;
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return false;
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@ -1140,7 +1139,7 @@ bool X86DAGToDAGISel::MatchAddressRecursively(SDValue N, X86ISelAddressMode &AM,
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/// specified addressing mode without any further recursion.
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bool X86DAGToDAGISel::MatchAddressBase(SDValue N, X86ISelAddressMode &AM) {
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// Is the base register already occupied?
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if (AM.BaseType != X86ISelAddressMode::RegBase || AM.Base.Reg.getNode()) {
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if (AM.BaseType != X86ISelAddressMode::RegBase || AM.Base_Reg.getNode()) {
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// If so, check to see if the scale index register is set.
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if (AM.IndexReg.getNode() == 0) {
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AM.IndexReg = N;
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@ -1154,7 +1153,7 @@ bool X86DAGToDAGISel::MatchAddressBase(SDValue N, X86ISelAddressMode &AM) {
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// Default, generate it as a register.
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AM.BaseType = X86ISelAddressMode::RegBase;
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AM.Base.Reg = N;
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AM.Base_Reg = N;
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return false;
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}
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@ -1170,8 +1169,8 @@ bool X86DAGToDAGISel::SelectAddr(SDNode *Op, SDValue N, SDValue &Base,
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EVT VT = N.getValueType();
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if (AM.BaseType == X86ISelAddressMode::RegBase) {
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if (!AM.Base.Reg.getNode())
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AM.Base.Reg = CurDAG->getRegister(0, VT);
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if (!AM.Base_Reg.getNode())
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AM.Base_Reg = CurDAG->getRegister(0, VT);
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}
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if (!AM.IndexReg.getNode())
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@ -1247,10 +1246,10 @@ bool X86DAGToDAGISel::SelectLEAAddr(SDNode *Op, SDValue N,
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EVT VT = N.getValueType();
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unsigned Complexity = 0;
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if (AM.BaseType == X86ISelAddressMode::RegBase)
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if (AM.Base.Reg.getNode())
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if (AM.Base_Reg.getNode())
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Complexity = 1;
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else
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AM.Base.Reg = CurDAG->getRegister(0, VT);
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AM.Base_Reg = CurDAG->getRegister(0, VT);
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else if (AM.BaseType == X86ISelAddressMode::FrameIndexBase)
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Complexity = 4;
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@ -1278,7 +1277,7 @@ bool X86DAGToDAGISel::SelectLEAAddr(SDNode *Op, SDValue N,
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Complexity += 2;
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}
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if (AM.Disp && (AM.Base.Reg.getNode() || AM.IndexReg.getNode()))
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if (AM.Disp && (AM.Base_Reg.getNode() || AM.IndexReg.getNode()))
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Complexity++;
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// If it isn't worth using an LEA, reject it.
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@ -1300,7 +1299,7 @@ bool X86DAGToDAGISel::SelectTLSADDRAddr(SDNode *Op, SDValue N, SDValue &Base,
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X86ISelAddressMode AM;
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AM.GV = GA->getGlobal();
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AM.Disp += GA->getOffset();
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AM.Base.Reg = CurDAG->getRegister(0, N.getValueType());
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AM.Base_Reg = CurDAG->getRegister(0, N.getValueType());
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AM.SymbolFlags = GA->getTargetFlags();
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if (N.getValueType() == MVT::i32) {
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