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[mips] Clean up class MipsCCInfo.
No functionality change intended. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175310 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -3007,9 +3007,9 @@ MipsTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
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SmallVector<CCValAssign, 16> ArgLocs;
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CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(),
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getTargetMachine(), ArgLocs, *DAG.getContext());
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MipsCC MipsCCInfo(CallConv, isVarArg, IsO32, CCInfo);
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MipsCC MipsCCInfo(CallConv, IsO32, CCInfo);
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MipsCCInfo.analyzeCallOperands(Outs);
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MipsCCInfo.analyzeCallOperands(Outs, isVarArg);
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// Get a count of how many bytes are to be pushed on the stack.
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unsigned NextStackOffset = CCInfo.getNextStackOffset();
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@ -3294,7 +3294,7 @@ MipsTargetLowering::LowerFormalArguments(SDValue Chain,
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SmallVector<CCValAssign, 16> ArgLocs;
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CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(),
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getTargetMachine(), ArgLocs, *DAG.getContext());
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MipsCC MipsCCInfo(CallConv, isVarArg, IsO32, CCInfo);
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MipsCC MipsCCInfo(CallConv, IsO32, CCInfo);
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MipsCCInfo.analyzeFormalArguments(Ins);
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MipsFI->setFormalArgInfo(CCInfo.getNextStackOffset(),
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@ -3776,40 +3776,21 @@ unsigned MipsTargetLowering::getJumpTableEncoding() const {
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return TargetLowering::getJumpTableEncoding();
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}
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MipsTargetLowering::MipsCC::MipsCC(CallingConv::ID CallConv, bool IsVarArg,
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bool IsO32, CCState &Info) : CCInfo(Info) {
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UseRegsForByval = true;
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if (IsO32) {
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RegSize = 4;
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NumIntArgRegs = array_lengthof(O32IntRegs);
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ReservedArgArea = 16;
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IntArgRegs = ShadowRegs = O32IntRegs;
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FixedFn = VarFn = CC_MipsO32;
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} else {
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RegSize = 8;
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NumIntArgRegs = array_lengthof(Mips64IntRegs);
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ReservedArgArea = 0;
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IntArgRegs = Mips64IntRegs;
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ShadowRegs = Mips64DPRegs;
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FixedFn = CC_MipsN;
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VarFn = IsVarArg ? CC_MipsN_VarArg : CC_MipsN;
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}
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if (CallConv == CallingConv::Fast) {
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assert(!IsVarArg);
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UseRegsForByval = false;
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ReservedArgArea = 0;
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FixedFn = VarFn = CC_Mips_FastCC;
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}
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MipsTargetLowering::MipsCC::MipsCC(CallingConv::ID CC, bool IsO32_,
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CCState &Info)
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: CCInfo(Info), CallConv(CC), IsO32(IsO32_) {
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// Pre-allocate reserved argument area.
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CCInfo.AllocateStack(ReservedArgArea, 1);
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CCInfo.AllocateStack(reservedArgArea(), 1);
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}
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void MipsTargetLowering::MipsCC::
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analyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Args) {
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analyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Args,
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bool IsVarArg) {
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assert((CallConv != CallingConv::Fast || !IsVarArg) &&
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"CallingConv::Fast shouldn't be used for vararg functions.");
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unsigned NumOpnds = Args.size();
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llvm::CCAssignFn *FixedFn = fixedArgFn(), *VarFn = varArgFn();
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for (unsigned I = 0; I != NumOpnds; ++I) {
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MVT ArgVT = Args[I].VT;
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@ -3821,10 +3802,10 @@ analyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Args) {
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continue;
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}
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if (Args[I].IsFixed)
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R = FixedFn(I, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, CCInfo);
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else
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if (IsVarArg && !Args[I].IsFixed)
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R = VarFn(I, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, CCInfo);
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else
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R = FixedFn(I, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, CCInfo);
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if (R) {
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#ifndef NDEBUG
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@ -3839,6 +3820,7 @@ analyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Args) {
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void MipsTargetLowering::MipsCC::
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analyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Args) {
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unsigned NumArgs = Args.size();
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llvm::CCAssignFn *FixedFn = fixedArgFn();
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for (unsigned I = 0; I != NumArgs; ++I) {
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MVT ArgVT = Args[I].VT;
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@ -3868,11 +3850,12 @@ MipsTargetLowering::MipsCC::handleByValArg(unsigned ValNo, MVT ValVT,
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assert(ArgFlags.getByValSize() && "Byval argument's size shouldn't be 0.");
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struct ByValArgInfo ByVal;
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unsigned RegSize = regSize();
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unsigned ByValSize = RoundUpToAlignment(ArgFlags.getByValSize(), RegSize);
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unsigned Align = std::min(std::max(ArgFlags.getByValAlign(), RegSize),
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RegSize * 2);
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if (UseRegsForByval)
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if (useRegsForByval())
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allocateRegs(ByVal, ByValSize, Align);
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// Allocate space on caller's stack.
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@ -3883,9 +3866,38 @@ MipsTargetLowering::MipsCC::handleByValArg(unsigned ValNo, MVT ValVT,
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ByValArgs.push_back(ByVal);
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}
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unsigned MipsTargetLowering::MipsCC::numIntArgRegs() const {
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return IsO32 ? array_lengthof(O32IntRegs) : array_lengthof(Mips64IntRegs);
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}
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unsigned MipsTargetLowering::MipsCC::reservedArgArea() const {
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return (IsO32 && (CallConv != CallingConv::Fast)) ? 16 : 0;
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}
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const uint16_t *MipsTargetLowering::MipsCC::intArgRegs() const {
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return IsO32 ? O32IntRegs : Mips64IntRegs;
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}
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llvm::CCAssignFn *MipsTargetLowering::MipsCC::fixedArgFn() const {
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if (CallConv == CallingConv::Fast)
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return CC_Mips_FastCC;
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return IsO32 ? CC_MipsO32 : CC_MipsN;
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}
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llvm::CCAssignFn *MipsTargetLowering::MipsCC::varArgFn() const {
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return IsO32 ? CC_MipsO32 : CC_MipsN_VarArg;
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}
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const uint16_t *MipsTargetLowering::MipsCC::shadowRegs() const {
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return IsO32 ? O32IntRegs : Mips64DPRegs;
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}
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void MipsTargetLowering::MipsCC::allocateRegs(ByValArgInfo &ByVal,
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unsigned ByValSize,
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unsigned Align) {
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unsigned RegSize = regSize(), NumIntArgRegs = numIntArgRegs();
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const uint16_t *IntArgRegs = intArgRegs(), *ShadowRegs = shadowRegs();
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assert(!(ByValSize % RegSize) && !(Align % RegSize) &&
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"Byval argument's size and alignment should be a multiple of"
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"RegSize.");
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@ -201,53 +201,57 @@ namespace llvm {
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/// arguments and inquire about calling convention information.
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class MipsCC {
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public:
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MipsCC(CallingConv::ID CallConv, bool IsVarArg, bool IsO32,
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CCState &Info);
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MipsCC(CallingConv::ID CallConv, bool IsO32, CCState &Info);
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void analyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs);
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void analyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs,
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bool IsVarArg);
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void analyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins);
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void handleByValArg(unsigned ValNo, MVT ValVT, MVT LocVT,
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CCValAssign::LocInfo LocInfo,
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ISD::ArgFlagsTy ArgFlags);
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const CCState &getCCInfo() const { return CCInfo; }
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/// hasByValArg - Returns true if function has byval arguments.
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bool hasByValArg() const { return !ByValArgs.empty(); }
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/// useRegsForByval - Returns true if the calling convention allows the
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/// use of registers to pass byval arguments.
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bool useRegsForByval() const { return UseRegsForByval; }
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/// regSize - Size (in number of bits) of integer registers.
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unsigned regSize() const { return RegSize; }
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unsigned regSize() const { return IsO32 ? 4 : 8; }
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/// numIntArgRegs - Number of integer registers available for calls.
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unsigned numIntArgRegs() const { return NumIntArgRegs; }
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unsigned numIntArgRegs() const;
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/// reservedArgArea - The size of the area the caller reserves for
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/// register arguments. This is 16-byte if ABI is O32.
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unsigned reservedArgArea() const { return ReservedArgArea; }
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unsigned reservedArgArea() const;
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/// intArgRegs - Pointer to array of integer registers.
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const uint16_t *intArgRegs() const { return IntArgRegs; }
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/// Return pointer to array of integer argument registers.
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const uint16_t *intArgRegs() const;
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typedef SmallVector<ByValArgInfo, 2>::const_iterator byval_iterator;
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byval_iterator byval_begin() const { return ByValArgs.begin(); }
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byval_iterator byval_end() const { return ByValArgs.end(); }
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private:
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void handleByValArg(unsigned ValNo, MVT ValVT, MVT LocVT,
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CCValAssign::LocInfo LocInfo,
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ISD::ArgFlagsTy ArgFlags);
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/// useRegsForByval - Returns true if the calling convention allows the
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/// use of registers to pass byval arguments.
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bool useRegsForByval() const { return CallConv != CallingConv::Fast; }
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/// Return the function that analyzes fixed argument list functions.
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llvm::CCAssignFn *fixedArgFn() const;
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/// Return the function that analyzes variable argument list functions.
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llvm::CCAssignFn *varArgFn() const;
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const uint16_t *shadowRegs() const;
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void allocateRegs(ByValArgInfo &ByVal, unsigned ByValSize,
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unsigned Align);
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CCState &CCInfo;
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bool UseRegsForByval;
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unsigned RegSize;
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unsigned NumIntArgRegs;
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unsigned ReservedArgArea;
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const uint16_t *IntArgRegs, *ShadowRegs;
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CallingConv::ID CallConv;
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bool IsO32;
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SmallVector<ByValArgInfo, 2> ByValArgs;
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llvm::CCAssignFn *FixedFn, *VarFn;
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};
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// Subtarget Info
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