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For inline asm:

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- recognize string "{memory}" in the MI generation
- mark as mayload/maystore when there's a memory clobber constraint.

PR14859.

Patch by Krzysztof Parzyszek

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172228 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Eric Christopher 2013-01-11 18:12:39 +00:00
parent eed4e0193f
commit fffe363493
4 changed files with 39 additions and 4 deletions
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6
lib/CodeGen/MachineInstr.cpp
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@ -1476,10 +1476,14 @@ void MachineInstr::print(raw_ostream &OS, const TargetMachine *TM) const {
OS << " ";
getOperand(InlineAsm::MIOp_AsmString).print(OS, TM);
// Print HasSideEffects, IsAlignStack
// Print HasSideEffects, MayLoad, MayStore, IsAlignStack
unsigned ExtraInfo = getOperand(InlineAsm::MIOp_ExtraInfo).getImm();
if (ExtraInfo & InlineAsm::Extra_HasSideEffects)
OS << " [sideeffect]";
if (ExtraInfo & InlineAsm::Extra_MayLoad)
OS << " [mayload]";
if (ExtraInfo & InlineAsm::Extra_MayStore)
OS << " [maystore]";
if (ExtraInfo & InlineAsm::Extra_IsAlignStack)
OS << " [alignstack]";
if (getInlineAsmDialect() == InlineAsm::AD_ATT)

6
lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
View File

@ -5948,6 +5948,10 @@ void SelectionDAGBuilder::visitInlineAsm(ImmutableCallSite CS) {
// Compute the constraint code and ConstraintType to use.
TLI.ComputeConstraintToUse(OpInfo, OpInfo.CallOperand, &DAG);
if (OpInfo.ConstraintType == TargetLowering::C_Memory &&
OpInfo.Type == InlineAsm::isClobber)
continue;
// If this is a memory input, and if the operand is not indirect, do what we
// need to to provide an address for the memory input.
if (OpInfo.ConstraintType == TargetLowering::C_Memory &&
@ -6051,6 +6055,8 @@ void SelectionDAGBuilder::visitInlineAsm(ImmutableCallSite CS) {
ExtraInfo |= InlineAsm::Extra_MayLoad;
else if (OpInfo.Type == InlineAsm::isOutput)
ExtraInfo |= InlineAsm::Extra_MayStore;
else if (OpInfo.Type == InlineAsm::isClobber)
ExtraInfo |= (InlineAsm::Extra_MayLoad | InlineAsm::Extra_MayStore);
}
}

10
lib/CodeGen/SelectionDAG/TargetLowering.cpp
View File

@ -3068,7 +3068,9 @@ PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const {
TargetLowering::ConstraintType
TargetLowering::getConstraintType(const std::string &Constraint) const {
if (Constraint.size() == 1) {
unsigned S = Constraint.size();
if (S == 1) {
switch (Constraint[0]) {
default: break;
case 'r': return C_RegisterClass;
@ -3097,9 +3099,11 @@ TargetLowering::getConstraintType(const std::string &Constraint) const {
}
}
if (Constraint.size() > 1 && Constraint[0] == '{' &&
Constraint[Constraint.size()-1] == '}')
if (S > 1 && Constraint[0] == '{' && Constraint[S-1] == '}') {
if (S == 8 && !Constraint.compare(1, 6, "memory", 6)) // "{memory}"
return C_Memory;
return C_Register;
}
return C_Unknown;
}

21
test/CodeGen/Generic/inline-asm-mem-clobber.ll Normal file
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@ -0,0 +1,21 @@
; RUN: llc -O2 < %s | FileCheck %s
@G = common global i32 0, align 4
define i32 @foo(i8* %p) nounwind uwtable {
entry:
%p.addr = alloca i8*, align 8
%rv = alloca i32, align 4
store i8* %p, i8** %p.addr, align 8
store i32 0, i32* @G, align 4
%0 = load i8** %p.addr, align 8
; CHECK: blah
%1 = call i32 asm "blah", "=r,r,~{memory}"(i8* %0) nounwind
; CHECK: @G
store i32 %1, i32* %rv, align 4
%2 = load i32* %rv, align 4
%3 = load i32* @G, align 4
%add = add nsw i32 %2, %3
ret i32 %add
}