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2 Commits

Author SHA1 Message Date
Justin Holewinski
7e6565112b [NVPTX] Rename registers %fl -> %fd and %rl -> %rd 
This matches the internal behavior of NVIDIA tools like libnvvm.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213168 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-07-16 16:26:58 +00:00
Eli Bendersky
b6f02c13da Add test to test/CodeGen/NVPTX for "alloca buffer" arguments. 
Make sure such IR gets properly lowered to PTX.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204624 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-03-24 16:52:30 +00:00