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08c33011d1
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15132 Commits

Author SHA1 Message Date
Chris Lattner
08c33011d1 add note about switch lowering 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30308 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-13 23:37:16 +00:00
Chris Lattner
a4646b61e4 Second half of the fix for Transforms/Inline/inline_cleanup.ll 
This folds unconditional branches that are often produced by code
specialization.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30307 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-13 21:27:00 +00:00
Nick Lewycky
668a1d0fd2 Add some more consistency checks. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30305 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-13 19:32:53 +00:00
Nick Lewycky
977be254c6 Fix unionSets so that it can merge correctly. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30304 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-13 19:24:01 +00:00
Chris Lattner
33bb3c8be3 Implement the first half of Transforms/Inline/inline_cleanup.ll 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30303 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-13 19:23:57 +00:00
Evan Cheng
80543c8305 Skip over first operand when determining REX prefix for two-address code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30300 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-13 19:07:28 +00:00
Nick Lewycky
cf2112a0a0 Erase dead instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30298 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-13 18:55:37 +00:00
Chris Lattner
bfd68a7858 Turn X < 0 -> TEST X,X js 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30294 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-13 17:04:54 +00:00
Chris Lattner
7a6366de86 The sense of this branch was inverted :( 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30293 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-13 16:56:12 +00:00
Chris Lattner
8a650095fc Fix a ton of jit failures 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30292 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-13 16:21:10 +00:00
Rafael Espindola
3ad5e5cf99 add shifts to addressing mode 1 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30291 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-13 12:09:43 +00:00
Chris Lattner
c970f062e0 If LSR went through a lot of trouble to put constants (e.g. the addr of a global 
in a specific BB, don't undo this!).  This allows us to compile
CodeGen/X86/loop-hoist.ll into:

_foo:
        xorl %eax, %eax
***     movl L_Arr$non_lazy_ptr, %ecx
        movl 4(%esp), %edx
LBB1_1: #cond_true
        movl %eax, (%ecx,%eax,4)
        incl %eax
        cmpl %edx, %eax
        jne LBB1_1      #cond_true
LBB1_2: #return
        ret

instead of:

_foo:
        xorl %eax, %eax
        movl 4(%esp), %ecx
LBB1_1: #cond_true
***     movl L_Arr$non_lazy_ptr, %edx
        movl %eax, (%edx,%eax,4)
        incl %eax
        cmpl %ecx, %eax
        jne LBB1_1      #cond_true
LBB1_2: #return
        ret

This was noticed in 464.h264ref.  This doesn't usually affect PPC,
but strikes X86 all the time.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30290 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-13 06:02:42 +00:00
Chris Lattner
0f27fc34f7 Fix a regression in the 32-bit port from the 64-bit port landing. 
We now compile CodeGen/X86/lea-2.ll into:

_test:
        movl 4(%esp), %eax
        movl 8(%esp), %ecx
        leal -5(%ecx,%eax,4), %eax
        ret

instead of:

_test:
        movl 4(%esp), %eax
        leal (,%eax,4), %eax
        addl 8(%esp), %eax
        addl $4294967291, %eax
        ret


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30288 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-13 04:45:25 +00:00
Chris Lattner
d1468d3332 new note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30286 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-13 04:19:50 +00:00
Chris Lattner
95af34e33f new note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30285 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-13 03:54:54 +00:00
Chris Lattner
79980b07da Compile X << 1 (where X is a long-long) to: 
addl %ecx, %ecx
        adcl %eax, %eax

instead of:

        movl %ecx, %edx
        addl %edx, %edx
        shrl $31, %ecx
        addl %eax, %eax
        orl %ecx, %eax

and to:

        addc r5, r5, r5
        adde r4, r4, r4

instead of:

        slwi r2,r9,1
        srwi r0,r11,31
        slwi r3,r11,1
        or r2,r0,r2

on PPC.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30284 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-13 03:50:39 +00:00
Chris Lattner
f95705163f Compile X > -1 -> text X,X; js dest 
This implements CodeGen/X86/jump_sign.ll.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30283 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-13 03:22:10 +00:00
Devang Patel
56eac5f6f7 Initialize DontInternalize. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30281 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-13 01:02:26 +00:00
Evan Cheng
c356a572e3 Reflects MachineConstantPoolEntry changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30279 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-12 21:04:05 +00:00
Evan Cheng
d6594ae54c Added support for machine specific constantpool values. These are useful for 
representing expressions that can only be resolved at link time, etc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30278 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-12 21:00:35 +00:00
Evan Cheng
cd5731d98b Reflect MachineConstantPoolEntry changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30277 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-12 20:59:59 +00:00
Chris Lattner
92f7365740 An sinkable instruction may exist with uses, if those uses are in dead blocks. 
Handle this.  This fixes PR908 and Transforms/LICM/2006-09-12-DeadUserOfSunkInstr.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30275 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-12 19:17:09 +00:00
Chris Lattner
adaa38f13d add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30271 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-12 06:36:01 +00:00
Chris Lattner
0bfd7fde43 Testcase noticed from PR906 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30269 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-11 23:00:56 +00:00
Chris Lattner
2a33a3f08d add compilable testcase 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30268 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-11 22:57:51 +00:00
Chris Lattner
63d3220dae Fix PR905 and InstCombine/2006-09-11-EmptyStructCrash.ll 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30266 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-11 21:43:16 +00:00
Rafael Espindola
817e7fdb8b implement SRL and MUL 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30262 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-11 19:24:19 +00:00
Rafael Espindola
1b3956b516 add the correct fallback for ARMDAGToDAGISel::SelectAddrMode1 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30261 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-11 19:23:32 +00:00
Rafael Espindola
7cca7c5317 partial implementation of the ARM Addressing Mode 1 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30252 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-11 17:25:40 +00:00
Nick Lewycky
3fc68ccd83 Skip the linear search if the answer is already known. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30251 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-11 17:23:34 +00:00
Rafael Espindola
ff59d22232 call AsmPrinter::doInitialization in ARMAsmPrinter::doInitialization 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30246 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-11 12:49:38 +00:00
Evan Cheng
f47d167c3b Updates. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30245 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-11 05:35:17 +00:00
Evan Cheng
0f4aa6ee20 Update README file. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30244 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-11 05:25:15 +00:00
Evan Cheng
734503be59 X86ISD::CMP now produces a chain as well as a flag. Make that the chain 
operand of a conditional branch to allow load folding into CMP / TEST
instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30241 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-11 02:19:56 +00:00
Nate Begeman
019f851ab2 Behold, more work on relocations. Things are looking pretty good now. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30240 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-10 23:03:44 +00:00
Anton Korobeynikov
f369dd26fb Removed unnecessary Mangler creation. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30239 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-10 21:17:03 +00:00
Chris Lattner
dfa1af0513 Allow tail duplication in more cases, relaxing the previous restriction a 
bit.  This fixes Regression/Transforms/TailDup/MergeTest.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30237 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-10 18:17:58 +00:00
Chris Lattner
c66764c007 This code was trying too hard. By eliminating redundant edges in the CFG 
due to switch cases going to the same place, it make #pred != #phi entries,
breaking live interval analysis.

This fixes 458.sjeng on x86 with llc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30236 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-10 06:36:57 +00:00
Nick Lewycky
dc08cd56c4 Replace EquivalenceClasses with a custom-built data structure. Many common 
operations (like findProperties) should be faster, at the expense of
unionSets being slower in cases that are rare in practise.

Don't erase a dead Instruction. This fixes a memory corruption issue.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30235 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-10 02:27:07 +00:00
Chris Lattner
2a86f3b744 Implement Transforms/InstCombine/hoist_instr.ll 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30234 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-09 22:02:56 +00:00
Chris Lattner
7b166d9969 Make inlining costs more accurate. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30231 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-09 20:40:44 +00:00
Chris Lattner
8e49e08f4b Turn div X, (Cond ? Y : 0) -> div X, Y 
This implements select.ll::test18.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30230 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-09 20:26:32 +00:00
Chris Lattner
1e14289ef9 Add cbe support for powi 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30226 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-09 06:17:12 +00:00
Chris Lattner
6ddf8ed6fe Implement the fpowi now by lowering to a libcall 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30225 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-09 06:03:30 +00:00
Chris Lattner
f3f333dbd6 Allow targets to custom lower expanded BIT_CONVERT's 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30217 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-09 00:20:27 +00:00
Nate Begeman
94be248dbb First pass at supporting relocations. Relocations are written correctly to 
the file now, however the relocated address is currently wrong.  Fixing
that will require some deep pondering.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30207 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-08 22:42:09 +00:00
Evan Cheng
6f34b43292 Fixed a FuseTwoAddrInst() bug: consider GlobalAddress and JumpTableIndex 
in addition to immediate operands.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30205 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-08 21:08:13 +00:00
Chris Lattner
0c5b8dac79 Non-allocatable physregs can be killed and dead, but don't treat them as 
safe for later allocation.  This fixes McCat/18-imp with llc-beta.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30204 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-08 20:21:31 +00:00
Chris Lattner
cc406328bf This fixes Benchmarks/Prolangs-C/unix-smail 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30198 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-08 19:11:11 +00:00
Chris Lattner
45d5788123 Fix a bunch of llc-beta failures on x86 yesterday. Don't allow selection 
of unallocatable registers, just because an alias is allocatable.  We were
picking registers like SIL just because ESI was being used.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30197 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-08 19:03:30 +00:00