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2246 Commits

Author SHA1 Message Date
Brian Gaeke
757ccd5149 Make AllocInfo's Instruction an int, so that we can overload it for arguments. 
(Instruction #-1's operands = argument list).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12245 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-03-08 23:22:01 +00:00
Chris Lattner
9b3c702614 Avoid allocating special registers a bit more robustly 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12207 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-03-08 03:48:07 +00:00
Chris Lattner
7dee5daf85 Implement folding explicit load instructions into binary operations. For a 
testcase like this:

int %test(int* %P, int %A) {
        %Pv = load int* %P
        %B = add int %A, %Pv
        ret int %B
}

We now generate:
test:
        mov %ECX, DWORD PTR [%ESP + 4]
        mov %EAX, DWORD PTR [%ESP + 8]
        add %EAX, DWORD PTR [%ECX]
        ret

Instead of:
test:
        mov %EAX, DWORD PTR [%ESP + 4]
        mov %ECX, DWORD PTR [%ESP + 8]
        mov %EAX, DWORD PTR [%EAX]
        add %EAX, %ECX
        ret

... saving one instruction, and often a register.  Note that there are a lot
of other instructions that could use this, but they aren't handled.  I'm not
really interested in adding them, but mul/div and all of the FP instructions
could be supported as well if someone wanted to add them.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12204 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-03-08 01:58:35 +00:00
Chris Lattner
721d2d4a6e Rearrange and refactor some code. No functionality changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12203 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-03-08 01:18:36 +00:00
Alkis Evlogimenos
13d362f310 Add memory operand version of conditional move. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12190 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-03-07 03:19:11 +00:00
Brian Gaeke
08f64c3321 Support return values of basic integer types. 
Emit RETL instruction to return instead of funny JMPL.
Fix indentation.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12186 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-03-06 05:32:28 +00:00
Brian Gaeke
a8056fabeb Sort stanzas into Sparc V8 book page number order. 
Add RET, RETL.  Rename SAVE, RESTORE & JMPL for consistency.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12185 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-03-06 05:32:13 +00:00
Brian Gaeke
bda4a3c61a Hack it so we do not try to allocate values to G0. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12184 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-03-06 05:31:32 +00:00
Brian Gaeke
d69b3c58d3 Make prolog align stack properly. Make epilog not touch any registers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12183 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-03-06 05:31:21 +00:00
Brian Gaeke
a8b00cafc4 Emit register names in lowercase, as required by the assembler. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12182 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-03-06 05:30:21 +00:00
Brian Gaeke
a98e051417 Teach getRegClassForType where to find FP registers 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12180 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-03-06 03:54:13 +00:00
Brian Gaeke
62aa28aef3 Asm output is looking a lot better; not correct for all operands yet though. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12143 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-03-05 08:39:09 +00:00
Brian Gaeke
7a3ae1fbad Support -print-machineinstrs 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12124 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-03-04 19:22:16 +00:00
Brian Gaeke
323819e4e1 make -print-machineinstrs work for both SparcV9 and X86 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12122 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-03-04 19:16:23 +00:00
Alkis Evlogimenos
ce1e500e2f Add assertion for scale verification. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12120 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-03-04 18:05:02 +00:00
Brian Gaeke
4acfd039f9 Asm printer support, based on x86 - only prints mnemonics for now 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12113 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-03-04 06:00:41 +00:00
Brian Gaeke
da69e7d9b3 Double-FP pseudo-registers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12112 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-03-04 05:15:03 +00:00
Brian Gaeke
775158d62a Subtract instructions; minor cleanups 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12111 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-03-04 04:37:45 +00:00
Brian Gaeke
e7173b7e8e Floating point regs 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12110 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-03-04 04:37:22 +00:00
Brian Gaeke
e806173ab6 Simple copyConstantToReg support, SETHIi and ORri 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12107 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-03-04 00:56:25 +00:00
Brian Gaeke
bc1d27aa6e Support add - note, still missing important copyConstantToRegister stuff 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12106 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-03-03 23:03:14 +00:00
Chris Lattner
b06f103d0c SPECIFY a target data to initialize the CBE target with. Until now we have 
been using the default target data layout object to lower malloc instructions,
causing us to allocate more memory than we needed!  This could improve the
performance of the CBE generated code substantially!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12088 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-03-03 02:14:15 +00:00
Chris Lattner
2bed9ecc4b Add a new constructor 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12087 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-03-03 02:12:47 +00:00
Misha Brukman
538607fe45 Doxygenify some comments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12064 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-03-01 23:53:11 +00:00
Chris Lattner
ec726a1a6e Add this back, as its absence introduces assertions, and it seems to work now 
that Instructions are annotable again


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12045 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-03-01 15:28:27 +00:00
Tanya Lattner
f048bfd97d fix bug in previous checkin 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12044 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-03-01 15:05:17 +00:00
Brian Gaeke
05b15fb075 TargetCacheInfo has been removed; its only uses were to propagate a constant 
(16) into certain areas of the SPARC V9 back-end. I'm fairly sure the US IIIi's
dcache has 32-byte lines, so I'm not sure where the 16 came from. However, in
the interest of not breaking things any more than they already are, I'm going
to leave the constant alone.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12043 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-03-01 06:43:29 +00:00
Tanya Lattner
9b3cbdbedb Adding new Modulo Scheduling graph files. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12031 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-03-01 02:50:57 +00:00
Tanya Lattner
d14b83733e Removing old graph files with new graph files that I wrote. Updated ModuloScheduling pass, but still in progress. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12030 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-03-01 02:50:01 +00:00
Chris Lattner
21585221b6 Handle passing constant integers to functions much more efficiently. Instead 
of generating this code:

        mov %EAX, 4
        mov DWORD PTR [%ESP], %EAX
        mov %AX, 123
        movsx %EAX, %AX
        mov DWORD PTR [%ESP + 4], %EAX
        call Y

we now generate:
        mov DWORD PTR [%ESP], 4
        mov DWORD PTR [%ESP + 4], 123
        call Y

Which hurts the eyes less.  :)

Considering that register pressure around call sites is already high (with all
of the callee clobber registers n stuff), this may help a lot.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12028 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-03-01 02:42:43 +00:00
Chris Lattner
ce6096f49b Fix a minor code-quality issue. When passing 8 and 16-bit integer constants 
to function calls, we would emit dead code, like this:

int Y(int, short, double);
int X() {
  Y(4, 123, 4);
}

--- Old
X:
        sub %ESP, 20
        mov %EAX, 4
        mov DWORD PTR [%ESP], %EAX
***     mov %AX, 123
        mov %AX, 123
        movsx %EAX, %AX
        mov DWORD PTR [%ESP + 4], %EAX
        fld QWORD PTR [.CPIX_0]
        fstp QWORD PTR [%ESP + 8]
        call Y
        mov %EAX, 0
        # IMPLICIT_USE %EAX %ESP
        add %ESP, 20
        ret

Now we emit:
X:
        sub %ESP, 20
        mov %EAX, 4
        mov DWORD PTR [%ESP], %EAX
        mov %AX, 123
        movsx %EAX, %AX
        mov DWORD PTR [%ESP + 4], %EAX
        fld QWORD PTR [.CPIX_0]
        fstp QWORD PTR [%ESP + 8]
        call Y
        mov %EAX, 0
        # IMPLICIT_USE %EAX %ESP
        add %ESP, 20
        ret

Next up, eliminate the mov AX and movsx entirely!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12026 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-03-01 02:34:08 +00:00
Chris Lattner
08d4963d49 Move the private MachineInstrAnnot.h into a private directory. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12003 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-29 19:12:51 +00:00
Chris Lattner
e85f2348c9 Do not use explicit casts that hide the dependence on Instruction being 
annotable


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12000 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-29 19:02:26 +00:00
Alkis Evlogimenos
96c9b8b496 Add instruction name description. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11998 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-29 18:44:03 +00:00
Alkis Evlogimenos
7f6124cfc2 Use correct template for SHLD and SHRD instructions so that the memory 
operand size is correctly specified.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11997 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-29 09:19:40 +00:00
Alkis Evlogimenos
9c22aeb0b2 Improve allocation order: 
1) For 8-bit registers try to use first the ones that are parts of the
   same register (AL then AH). This way we only alias 2 16/32-bit
   registers after allocating 4 8-bit variables.

2) Move EBX as the last register to allocate. This will cause less
   spills to happen since we will have 8-bit registers available up to
   register excaustion (assuming we use the allocation order). It
   would be nice if we could push all of the 8-bit aliased registers
   towards the end but we much prefer to keep callee saved register to
   the end to avoid saving them on entry and exit of the function.

For example this gives a slight reduction of spills with linear scan
on 164.gzip.

Before:

11221 asm-printer           - Number of machine instrs printed
  975 spiller               - Number of loads added
  675 spiller               - Number of stores added
  398 spiller               - Number of register spills

After:

11182 asm-printer           - Number of machine instrs printed
  952 spiller               - Number of loads added
  652 spiller               - Number of stores added
  386 spiller               - Number of register spills


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11996 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-29 09:17:01 +00:00
Alkis Evlogimenos
8295f202d9 A big X86 instruction rename. The instructions are renamed to make 
their names more decriptive. A name consists of the base name, a
default operand size followed by a character per operand with an
optional special size. For example:

ADD8rr -> add, 8-bit register, 8-bit register

IMUL16rmi -> imul, 16-bit register, 16-bit memory, 16-bit immediate

IMUL16rmi8 -> imul, 16-bit register, 16-bit memory, 8-bit immediate

MOVSX32rm16 -> movsx, 32-bit register, 16-bit memory


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11995 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-29 08:50:03 +00:00
Brian Gaeke
6ac5300fbc Remove dead member variables of SparcV9SchedInfo and TargetSchedInfo 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11994 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-29 08:40:03 +00:00
Chris Lattner
ee352852e7 Eliminate the X86-specific BMI functions, using BuildMI instead. 
Replace uses of addZImm with addImm.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11992 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-29 07:22:16 +00:00
Chris Lattner
168aa90bf6 Fix a miscompilation of 197.parser that occurs when you have single basic 
block loops.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11990 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-29 07:10:16 +00:00
Chris Lattner
dce363d5ec Adjust to change in TII ctor arguments 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11987 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-29 06:31:44 +00:00
Chris Lattner
bceb68807f Eliminate the distinction between "real" and "unreal" instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11986 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-29 06:31:16 +00:00
Chris Lattner
1ddf475b6a These two virtual methods are never called. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11984 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-29 05:59:33 +00:00
Chris Lattner
0755912c38 Remove a TON of flags that noone cares about 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11983 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-29 05:58:30 +00:00
Chris Lattner
9a945277c0 Noone calls these virtual methods 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11982 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-29 05:58:16 +00:00
Chris Lattner
0723969e87 This is the only file in the system that uses this enum. eliminate it. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11981 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-29 05:57:59 +00:00
Chris Lattner
e1274de2c9 Implement initial prolog/epilog code insertion methods. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11979 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-29 05:18:30 +00:00
Alkis Evlogimenos
8777d241cf Use correct template for ADC instruction with memory operands. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11974 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-29 02:18:17 +00:00
Chris Lattner
1c809c594b Add an instruction selector capable of selecting 'ret void' 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11973 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-29 00:27:00 +00:00
Alkis Evlogimenos
da474adb21 SHLD and SHRD take 32-bit operands but an 8-bit immediate. Rename them 
to denote this fact.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11972 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-28 23:46:44 +00:00
Alkis Evlogimenos
8e475b8cfd Floating point loads/stores act on memory operands. Rename them to 
denote this fact.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11971 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-28 23:42:35 +00:00
Alkis Evlogimenos
91c4b52e7f Rename instruction templates to be easier to the human eye to 
parse. The name is now I (operand size)*. For example:

Im32 -> instruction with 32-bit memory operands.

Im16i8 -> instruction with 16-bit memory operands and 8 bit immediate
          operands.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11970 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-28 23:09:03 +00:00
Alkis Evlogimenos
f8da4d8839 Uncomment instructions that take both an immediate and a memory 
operand but their sizes differ.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11969 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-28 22:06:59 +00:00
Alkis Evlogimenos
5ab29b504d Each instruction now has both an ImmType and a MemType. This describes 
the size of the immediate and the memory operand on instructions that
use them. This resolves problems with instructions that take both a
memory and an immediate operand but their sizes differ (i.e. ADDmi32b).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11967 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-28 22:02:05 +00:00
Chris Lattner
9ff6ba1ea1 Change this so that LLC actually tries to run the code generator, though it will 
immediately abort due to lack of an instruction selector. :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11963 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-28 20:21:45 +00:00
Chris Lattner
8a62384253 SparcV8 now builds. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11960 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-28 19:54:00 +00:00
Chris Lattner
9a89f37dc7 fine grainify namespacification 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11959 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-28 19:53:18 +00:00
Chris Lattner
8d8a6bc7a3 Finegrainify namespacification 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11958 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-28 19:52:49 +00:00
Chris Lattner
a85d46eea8 Tab completion is our friend. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11957 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-28 19:45:39 +00:00
Chris Lattner
83ba99ac46 Clean up rules 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11956 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-28 19:43:40 +00:00
Chris Lattner
275f6459ab Bring this directory into "it actually compiles" land 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11955 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-28 19:37:18 +00:00
Chris Lattner
f13bd49d6a Fix multiple inclusion problem 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11954 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-28 19:31:32 +00:00
Alkis Evlogimenos
745502a04b Do not generate instructions with mismatched memory/immediate sized 
operands. The X86 backend doesn't handle them properly right now.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11944 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-28 06:01:43 +00:00
Alkis Evlogimenos
84cda0f470 Further comment updates. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11933 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-28 03:20:31 +00:00
Alkis Evlogimenos
a643a1a528 Update comments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11932 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-28 03:12:31 +00:00
Alkis Evlogimenos
2eae379388 My previous commit broke the jit. The shift instructions always take 
an 8-bit immediate. So mark the shifts that take immediates as taking
an 8-bit argument. The rest with the implicit use of CL are marked
appropriately.

A bug still exists:

def SHLDmri32  : I2A8 <"shld", 0xA4, MRMDestMem>, TB;           // [mem32] <<= [mem32],R32 imm8

The immediate in the above instruction is 8-bit but the memory
reference is 32-bit. The printer prints this as an 8-bit reference
which confuses the assembler. Same with SHRDmri32.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11931 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-28 02:56:26 +00:00
Brian Gaeke
9f78bf2ff7 Turn off the SparcV9MachineCodeDestructionPass for now, because it's buggy 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11930 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-27 21:15:40 +00:00
Brian Gaeke
3d1fdee339 Correct DestroyMachineFunction's getPassName 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11929 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-27 21:01:14 +00:00
Alkis Evlogimenos
fa5229691f Fix argument size for SHL, SHR, SAR, SHLD and SHRD families of 
instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11923 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-27 19:46:30 +00:00
Alkis Evlogimenos
f9186e38d5 Fix encoding of ADD and SUB family of instructions. Also rearrange 
them so that they are consistent with AND, XOR, etc...


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11922 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-27 18:57:00 +00:00
Alkis Evlogimenos
169584ed45 Rename MRMS[0-7]{r,m} to MRM[0-7]{r,m}. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11921 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-27 18:55:12 +00:00
Alkis Evlogimenos
08388a4787 Add memory operand folding support for the SETcc family of 
instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11907 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-27 16:13:37 +00:00
Alkis Evlogimenos
e56508eb7e Add memory operand folding support for SHLD and SHRD instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11905 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-27 15:03:18 +00:00
Alkis Evlogimenos
58ec60589b Add memory operand folding support for SHL, SHR and SAR, SHLD instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11903 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-27 09:28:43 +00:00
Alkis Evlogimenos
e35ba65b02 Rename SHL, SHR, SAR, SHLD and SHLR instructions to make them 
consistent with the rest and also pepare for the addition of their
memory operand variants.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11902 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-27 06:57:05 +00:00
John Criswell
3799eec3cf Fixes for PR258 and PR259. 
Functions with linkonce linkage are declared with weak linkage.
Global floating point constants used to represent unprintable values
(such as NaN and infinity) are declared static so that they don't interfere
with other CBE generated translation units.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11884 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-26 22:20:58 +00:00
Alkis Evlogimenos
71e353ed35 Uncomment assertions that register# != 0 on calls to 
MRegisterInfo::is{Physical,Virtual}Register. Apply appropriate fixes
to relevant files.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11882 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-26 22:00:20 +00:00
Chris Lattner
0e7ac16926 Use a map instead of annotations 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11875 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-26 08:02:17 +00:00
Chris Lattner
8dd8d261a4 Fix some warnings, some of which were spurious, and some of which were real 
bugs.  Thanks Brian!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11859 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-26 01:20:02 +00:00
Misha Brukman
23e6c1ff45 Instructions to call and return from functions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11858 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-26 00:37:12 +00:00
Brian Gaeke
367b91d1bd Great sparc renaming fallout IV: Sparc --> SparcV9. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11844 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-25 22:09:36 +00:00
Misha Brukman
757df02826 SparcV8 regs are really 32-bit, not 64! Thanks, Chris. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11835 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-25 21:03:02 +00:00
Misha Brukman
e07c2aa67c Clean up the tablegen descriptions for SparcV8. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11834 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-25 21:02:21 +00:00
Misha Brukman
5914bf6ef5 Fix the SparcV8 register definitions that were imported from PPC template. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11833 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-25 21:00:05 +00:00
Misha Brukman
3dff822988 SparcV8 has different types of instructions, but F1 is only used for CALL. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11832 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-25 20:52:20 +00:00
Chris Lattner
87124425d0 Fix failures in 099.go due to the cfgsimplify pass creating switch instructions 
where there did not used to be any before


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11829 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-25 19:30:19 +00:00
Brian Gaeke
e785e531f4 SparcV8 skeleton 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11828 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-25 19:28:19 +00:00
Brian Gaeke
150666fd82 Great renaming part II: Sparc --> SparcV9 (also includes command-line options and Makefiles) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11827 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-25 19:08:12 +00:00
Brian Gaeke
e3d6807ab5 Great renaming: Sparc --> SparcV9 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11826 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-25 18:44:15 +00:00
Chris Lattner
5f2c7b1975 Teach the instruction selector how to transform 'array' GEP computations into X86 
scaled indexes.  This allows us to compile GEP's like this:

int* %test([10 x { int, { int } }]* %X, int %Idx) {
        %Idx = cast int %Idx to long
        %X = getelementptr [10 x { int, { int } }]* %X, long 0, long %Idx, ubyte 1, ubyte 0
        ret int* %X
}

Into a single address computation:

test:
        mov %EAX, DWORD PTR [%ESP + 4]
        mov %ECX, DWORD PTR [%ESP + 8]
        lea %EAX, DWORD PTR [%EAX + 8*%ECX + 4]
        ret

Before it generated:
test:
        mov %EAX, DWORD PTR [%ESP + 4]
        mov %ECX, DWORD PTR [%ESP + 8]
        shl %ECX, 3
        add %EAX, %ECX
        lea %EAX, DWORD PTR [%EAX + 4]
        ret

This is useful for things like int/float/double arrays, as the indexing can be folded into
the loads&stores, reducing register pressure and decreasing the pressure on the decode unit.
With these changes, I expect our performance on 256.bzip2 and gzip to improve a lot.  On
bzip2 for example, we go from this:

10665 asm-printer           - Number of machine instrs printed
   40 ra-local              - Number of loads/stores folded into instructions
 1708 ra-local              - Number of loads added
 1532 ra-local              - Number of stores added
 1354 twoaddressinstruction - Number of instructions added
 1354 twoaddressinstruction - Number of two-address instructions
 2794 x86-peephole          - Number of peephole optimization performed

to this:
9873 asm-printer           - Number of machine instrs printed
  41 ra-local              - Number of loads/stores folded into instructions
1710 ra-local              - Number of loads added
1521 ra-local              - Number of stores added
 789 twoaddressinstruction - Number of instructions added
 789 twoaddressinstruction - Number of two-address instructions
2142 x86-peephole          - Number of peephole optimization performed

... and these types of instructions are often in tight loops.

Linear scan is also helped, but not as much.  It goes from:

8787 asm-printer           - Number of machine instrs printed
2389 liveintervals         - Number of identity moves eliminated after coalescing
2288 liveintervals         - Number of interval joins performed
3522 liveintervals         - Number of intervals after coalescing
5810 liveintervals         - Number of original intervals
 700 spiller               - Number of loads added
 487 spiller               - Number of stores added
 303 spiller               - Number of register spills
1354 twoaddressinstruction - Number of instructions added
1354 twoaddressinstruction - Number of two-address instructions
 363 x86-peephole          - Number of peephole optimization performed

to:

7982 asm-printer           - Number of machine instrs printed
1759 liveintervals         - Number of identity moves eliminated after coalescing
1658 liveintervals         - Number of interval joins performed
3282 liveintervals         - Number of intervals after coalescing
4940 liveintervals         - Number of original intervals
 635 spiller               - Number of loads added
 452 spiller               - Number of stores added
 288 spiller               - Number of register spills
 789 twoaddressinstruction - Number of instructions added
 789 twoaddressinstruction - Number of two-address instructions
 258 x86-peephole          - Number of peephole optimization performed

Though I'm not complaining about the drop in the number of intervals.  :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11820 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-25 07:00:55 +00:00
Chris Lattner
b6bac51351 * Make the previous patch more efficient by not allocating a temporary MachineInstr 
to do analysis.

*** FOLD getelementptr instructions into loads and stores when possible,
    making use of some of the crazy X86 addressing modes.

For example, the following C++ program fragment:

struct complex {
    double re, im;
    complex(double r, double i) : re(r), im(i) {}
};
inline complex operator+(const complex& a, const complex& b) {
    return complex(a.re+b.re, a.im+b.im);
}
complex addone(const complex& arg) {
    return arg + complex(1,0);
}

Used to be compiled to:
_Z6addoneRK7complex:
        mov %EAX, DWORD PTR [%ESP + 4]
        mov %ECX, DWORD PTR [%ESP + 8]
***     mov %EDX, %ECX
        fld QWORD PTR [%EDX]
        fld1
        faddp %ST(1)
***     add %ECX, 8
        fld QWORD PTR [%ECX]
        fldz
        faddp %ST(1)
***     mov %ECX, %EAX
        fxch %ST(1)
        fstp QWORD PTR [%ECX]
***     add %EAX, 8
        fstp QWORD PTR [%EAX]
        ret

Now it is compiled to:
_Z6addoneRK7complex:
        mov %EAX, DWORD PTR [%ESP + 4]
        mov %ECX, DWORD PTR [%ESP + 8]
        fld QWORD PTR [%ECX]
        fld1
        faddp %ST(1)
        fld QWORD PTR [%ECX + 8]
        fldz
        faddp %ST(1)
        fxch %ST(1)
        fstp QWORD PTR [%EAX]
        fstp QWORD PTR [%EAX + 8]
        ret

Other programs should see similar improvements, across the board.  Note that
in addition to reducing instruction count, this also reduces register pressure
a lot, always a good thing on X86.  :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11819 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-25 06:13:04 +00:00
Chris Lattner
2e68037187 Add a helper to create an addressing mode given all of the pieces. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11818 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-25 06:01:07 +00:00
Chris Lattner
985fe3df6f add an inefficient way of folding structure and constant array indexes together 
into a single LEA instruction.  This should improve the code generated for
things like X->A.B.C[12].D.

The bigger benefit is still coming though.  Note that this uses an LEA instruction
instead of an add, giving the register allocator more freedom.  We should probably
never generate ADDri32's.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11817 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-25 03:45:50 +00:00
Chris Lattner
5a83096d6a Implement special case for storing an immediate into memory so that we don't need 
an intermediate register.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11816 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-25 02:56:58 +00:00
Brian Gaeke
748fba141f FunctionLiveVarInfo.h moved: include/llvm/CodeGen -> lib/Target/Sparc/LiveVar 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11804 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-24 19:46:00 +00:00
Chris Lattner
2bcab1f900 Fix some unexpected fallout from the config.h changes. Because the CBE no 
longer was getting this #include, it always fell back on the less precise
floating point initializer values, causing some testsuite failures.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11803 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-24 18:34:10 +00:00
Alkis Evlogimenos
743d0a1f83 Refactor rewinding code for finding the first terminator of a basic 
block into MachineBasicBlock::getFirstTerminator().

This also fixes a bug in the implementation of the above in both
RegAllocLocal and InstrSched, where instructions where added after the
terminator if the basic block's only instruction was a terminator (it
shouldn't matter for RegAllocLocal since this case never occurs in
practice).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11748 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-23 18:14:48 +00:00
Chris Lattner
fbc39d5045 Simplify code a bit, don't go off the end of the block, now that the current 
block we are in might be empty


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11744 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-23 07:42:19 +00:00
Chris Lattner
65cf42d32f We were forgetting to add FP_REG_KILL instructions to basic blocks which will 
eventually get an assignment due to elimination of PHIs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11743 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-23 07:29:45 +00:00
Chris Lattner
f7b42259e9 Work around a gas bug. Print '-9223372036854775808' as unsigned. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11729 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-23 03:27:05 +00:00
Chris Lattner
311ca2e51f Implement cast fp -> bool 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11728 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-23 03:21:41 +00:00
Chris Lattner
baa58a5691 Stop passing iterators around by reference now that we have ilists! 
Implement cast Type::ULongTy -> double


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11726 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-23 03:10:10 +00:00
Chris Lattner
2d0a82570a Add a new cmove instruction 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11722 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-23 01:16:05 +00:00
Chris Lattner
986618ebc7 Only insert FP_REG_KILL instructions in MachineBasicBlocks that actually 
use FP instructions.  This reduces the number of instructions inserted in
176.gcc (for example) from 58074 to 101 (it doesn't use much FP, which
is typical).  This reduction speeds up the entire code generator.  In the
case of 176.gcc, llc went from taking 31.38s to 24.78s.  The passes that
sped up the most are the register allocator and the 2 live variable analysis
passes, which sped up 2.3, 1.3, and 1.5s respectively.  The asmprinter
pass also sped up because it doesn't print the instructions in comments :)

Note that this patch is likely to expose latent bugs in machine code passes,
because now basicblock can be empty, where they were never empty before.  I
cleaned out regalloclocal, but who knows about linscan :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11717 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-22 19:47:26 +00:00
Alkis Evlogimenos
890f92328d Move MOTy::UseType enum into MachineOperand. This eliminates the 
switch statements in the constructors and simplifies the
implementation of the getUseType() member function. You will have to
specify defs using MachineOperand::Def instead of MOTy::Def though
(similarly for Use and UseAndDef).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11715 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-22 19:23:26 +00:00
Chris Lattner
7ca04097ad Reduce the number of pointless copies inserted due to constant pointer refs. 
Also, make an assertion actually fireable!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11713 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-22 17:35:42 +00:00
Chris Lattner
827832c705 Fix bug in previous checkout: leave the iterator at the first instruction 
AFTER the GEP that was emitted.  :(


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11712 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-22 17:05:38 +00:00
Chris Lattner
3f1e8e7ceb Completely rewrite how getelementptr instructions are expanded. This has two 
(minor) benefits right now:

1. An extra dummy MOVrr32 is gone.  This move would often be coallesced by
   both allocators anyway.
2. The code now uses the gep_type_iterator to walk the gep, which should future
   proof it a bit.  It still assumes that array indexes are Longs though.

These don't really justify rewriting the code.  The big benefit will come later
though.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11710 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-22 07:04:00 +00:00
Alkis Evlogimenos
f216421181 When folding memory operands in machine instructions be careful to 
leave register operands with the same use/def flags as the original
instruction.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11709 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-22 06:54:26 +00:00
Chris Lattner
14c6ef7ca1 Wow this is out of date. When we have _real_ code generator documentation, 
this should be folded into it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11705 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-22 05:53:54 +00:00
Chris Lattner
6d2fdcfb8a The two address pass cannot handle two addr instructions where one incoming 
value is a physreg and one is a virtreg.  For this reason, disable copy folding
entirely for physregs.  Also, use the new isMoveInstr target hook which gives us
folding of FP moves as well.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11700 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-22 04:44:58 +00:00
Chris Lattner
f358c5ad15 It is totally unacceptable to print out (literally) millions of zeros when 
compiling 129.compress... so don't!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11649 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-20 05:49:22 +00:00
Chris Lattner
e6d04f1a99 Eliminate operator[] is deprecated warnings 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11578 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-18 16:43:51 +00:00
Chris Lattner
fdc01cedd4 Fix deprecated operator[] warnings 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11577 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-18 16:38:18 +00:00
Alkis Evlogimenos
e9118f3694 Fix argument size for MOVSX and MOVZX instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11576 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-18 16:20:40 +00:00
Chris Lattner
cc0d2f586f Add support for GlobalAddress's for alkis 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11560 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-17 18:23:55 +00:00
Alkis Evlogimenos
9b9b7fc28d These store to memory too. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11558 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-17 17:53:48 +00:00
Chris Lattner
acce13e4cc These store to memory, not read from it. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11556 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-17 17:46:50 +00:00
Alkis Evlogimenos
d886ed99fb Instructiosn with 1 memory operand have 4 operands in our 
representation.. duh!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11554 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-17 15:58:13 +00:00
Alkis Evlogimenos
f41dadafae Align case statements. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11552 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-17 15:50:41 +00:00
Alkis Evlogimenos
14ffe75c9c Add TEST and XCHG memory operand support. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11550 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-17 15:48:42 +00:00
Alkis Evlogimenos
68bff8e15d Add OR and XOR memory operand support. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11549 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-17 15:33:14 +00:00
Alkis Evlogimenos
e287a00440 Peephole optimize SUBmi{16,32} into SUBmi{16,32}b when immediate is 8 
bits wide.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11548 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-17 15:14:29 +00:00
Alkis Evlogimenos
cacca82833 ADDmi{16,32} should be in the next case statement. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11547 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-17 15:10:11 +00:00
Alkis Evlogimenos
a7be982e72 Add memory operand folding support for MUL, DIV, IDIV, NEG, NOT, 
MOVSX, and MOVZX.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11546 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-17 09:14:23 +00:00
Alkis Evlogimenos
89b0214b76 Add memory operand folding for CMP{rm,mr,mi}{8,16,32}, INCm{8,16,32} 
and DECm{8,16,32} instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11545 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-17 08:49:20 +00:00
Alkis Evlogimenos
509d6d65b5 Add CMP{rm,mr,mi}{8,16,32}, INCm{8,16,32} and DECm{8,16,32} instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11544 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-17 08:49:00 +00:00
Alkis Evlogimenos
503770cfc3 Add SUB{rm,mr,mi}{8,16,32} instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11543 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-17 08:17:40 +00:00
Alkis Evlogimenos
18bd7bb4d4 Add support for folding memory operands for ADC, SBB and SUB instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11541 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-17 08:08:51 +00:00
Alkis Evlogimenos
69da6dba79 Add support for ADC{rm.mr}32 and SBB{rm,mr}32. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11540 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-17 08:06:31 +00:00
Chris Lattner
ee0919bb10 Add a (hidden) option to print instructions that fail to fuse. It's looking 
like compares and test's would be the next huge win...


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11539 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-17 08:03:47 +00:00
Alkis Evlogimenos
17dc674c13 Add support for folding memory operands in MOVri{8,16,32} instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11538 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-17 07:47:20 +00:00
Chris Lattner
5b67252620 Expand the repertoire of the forms we can print and encode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11537 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-17 07:40:44 +00:00
Chris Lattner
651fd55d5f Disable this peephole for now. We can't keep track of the fact that the immediate is 8 bits, 
but the memory reference is full sized.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11536 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-17 07:36:32 +00:00
Chris Lattner
a7660be6c2 Add an option to disable spill fusing in the X86 backend 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11531 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-17 06:30:34 +00:00
Chris Lattner
e87331d11d Fix the mneumonics for the mov instructions to have the source and destination 
order in the correct sense!! Arg!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11530 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-17 06:28:19 +00:00
Chris Lattner
7ddc3fbd22 Fix the last crimes against nature that used the 'ir' ordering to use the 
'ri' ordering instead... no it's not possible to store a register into an
immediate!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11529 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-17 06:24:02 +00:00
Chris Lattner
f120ebbf8a GRRR. Move instructions have swapped the order of the r/m operands. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11528 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-17 06:20:20 +00:00
Chris Lattner
6e173a0d9c Rename MOVi[mr] instructions to MOV[rm]i 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11527 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-17 06:16:44 +00:00
Chris Lattner
90c38c8141 Whoops, got my cases swapped. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11526 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-17 06:02:15 +00:00
Chris Lattner
5a051f65d3 Change to match the newer, simpler, interface 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11525 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-17 05:54:57 +00:00
Chris Lattner
0f9c491abc Add support for folding memory operands into AND and IMUL's 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11523 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-17 05:46:06 +00:00
Chris Lattner
7c035b73a4 Scrunchify code, by adding helpers. No functionality changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11522 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-17 05:35:13 +00:00
Chris Lattner
4ff7876c64 Add mem forms of AND instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11521 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-17 05:25:50 +00:00
Alkis Evlogimenos
b499866c05 Add API to check and fold memory operands into instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11519 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-17 04:33:18 +00:00
Chris Lattner
55b5481255 Rename the IMULri* instructions to IMULrri, as they are actually three address 
instructions.  Add forms of these instructions that read from memory


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11518 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-17 04:26:43 +00:00
Alkis Evlogimenos
31bbb5190b Add peephole optimizations for ADD [MEM], IMM8 instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11511 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-16 23:50:18 +00:00
Alkis Evlogimenos
7271e0e107 Add two more variants of add. Update comments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11510 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-16 23:48:42 +00:00
Chris Lattner
e0f636a068 Add some ADD instructions that take memory operands for Alkis 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11502 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-16 18:19:31 +00:00
Chris Lattner
e42cde2a14 Now that the lowerinvoke pass inserts calls to llvm.setjmp/llvm.longjmp, some 
hacks can be banished.  Also, this gives us the opportunity to emit special code
for the setjmp/longjmps which alows the elimination of one GCC warning for every
setjmp/longjmp site (which is often THOUSANDS in C++ programs).  Yaay!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11484 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-15 22:51:47 +00:00
Alkis Evlogimenos
859a18b583 Make dense maps keyed on physical registers smallerusing 
MRegisterInfo::getNumRegs() instead of
MRegisterInfo::FirstVirtualRegister.

Also use MRegisterInfo::is{Physical,Virtual}Register where
appropriate.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11477 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-15 21:37:17 +00:00
Chris Lattner
de512b5b2e Adjustments to support the new ConstantAggregateZero class 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11474 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-15 05:55:15 +00:00
Chris Lattner
cfb0fd2ce8 Add support for the new ConstantAggregateZero class 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11473 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-15 05:54:27 +00:00
Chris Lattner
0e5b79c174 Implement llvm.(frame|return)address(0) correctly. They are used by the LLVM JIT, among other 
applications


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11459 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-15 01:04:03 +00:00
Alkis Evlogimenos
b929bca027 Fix problem in DEBUG code. I could be pointing past the end and 
dereferencing it causes an assertion error.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11458 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-15 00:46:41 +00:00
Chris Lattner
96c3d2e2e7 Fix the 'have a framepointer' case, so that the frame pointer always points 
to the old saved EBP.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11455 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-15 00:15:37 +00:00
Alkis Evlogimenos
c81efdc59c Add back machine code deleter pass until we get a MachineCode pass 
that will be responsible for the creation of MachineFunctions and will
be required by all MachineFunctionPass passes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11453 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-15 00:03:15 +00:00
Chris Lattner
3193556387 Add support for the 'pop' instruction 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11451 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-14 21:06:02 +00:00
Chris Lattner
e9dd84ea8a There is no reason to align the stack pointer if there are no callees of this 
function!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11450 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-14 20:11:07 +00:00
Chris Lattner
bb07ef97cf The prologue/epilogue related method calls have no reason to return a value, 
make them return void.

This allows us to avoid some costly MBB.size() calls


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11448 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-14 19:49:54 +00:00
Chris Lattner
300d0eda6f finegrainify namespacification, fix 80col prob 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11445 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-14 06:00:36 +00:00
Chris Lattner
9f87a6ce6f Urg, right. These need an input value... 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11443 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-14 04:47:23 +00:00
Chris Lattner
2a0f224ce9 Codegen llvm.memset into rep stos[bwd]. Simplify code for llvm.memcpy 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11442 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-14 04:46:05 +00:00
Chris Lattner
b89abef577 add 'rep stos[bwd]' instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11441 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-14 04:45:37 +00:00
Chris Lattner
fe1554a080 Add support for the returnaddress and frameaddress intrinsics 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11433 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-14 02:55:36 +00:00
Alkis Evlogimenos
f81af21caf Use newly added next() and prior() utility functions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11430 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-14 01:18:34 +00:00
Chris Lattner
4ef51373c4 Use intrinsic lowering like the rest of the backends. Get rid of crufty hacky 
code that worked around problems in the mangler


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11426 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-14 00:31:10 +00:00
Chris Lattner
0712283e43 There is no need to emit a shift if the size is constant, which is common 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11420 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-13 23:36:47 +00:00
Chris Lattner
c01ab8f3e1 Moved directory, update makefile 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11417 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-13 23:31:12 +00:00
Chris Lattner
76a92ae84a CBackend now lives here 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11415 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-13 23:29:20 +00:00
Chris Lattner
f31182a531 Convert the C backend into a target, for use with LLC. This allows us to use 
the lowerallocations pass to eliminate malloc/free warnings and hackish code


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11409 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-13 23:18:48 +00:00
Chris Lattner
94f4f8ea10 Make the cwriter use the lowerinvoke pass so that it can either use "disabled exceptions" or 
"expensive exceptions" controlled by an option.  Also refactor and eliminate a bunch of cruft.
This is a temporary solution and causes millions of warnings to pour out of programs that use
exceptions, but it should fix the problem with sparc and the 'write' declaration (PR190).
Subsequent changes will make this stink much less


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11405 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-13 23:00:29 +00:00
Alkis Evlogimenos
be766c7246 Remove getAllocatedRegNum(). Use getReg() instead. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11393 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-13 21:01:20 +00:00
Chris Lattner
b4198a2880 Squish warning 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11375 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-13 16:14:50 +00:00
Chris Lattner
897bf0dea5 Fine grainify namespacification, prune #includes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11369 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-13 06:18:21 +00:00
Chris Lattner
f8cd9148f9 Add support for memcpy and memmove intrinsics. Why isn't the cwriter using 
the intrinsiclowering code?? :(


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11362 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-12 23:13:33 +00:00
Chris Lattner
915e5e56d7 Add support for the rep movs[bwd] instructions, and emit them when code 
generating the llvm.memcpy intrinsic.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11351 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-12 17:53:22 +00:00
Alkis Evlogimenos
024126ee23 Change interface so that we can add to the end of a basic block 
without getting an assertion from ilist that we are dereferencing
ilist<T>::end().


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11345 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-12 08:11:04 +00:00
Brian Gaeke
17247c64f2 Remove this MachineOpCodeFlags assertion - its test can never be false. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11342 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-12 04:01:07 +00:00
Alkis Evlogimenos
c0b9dc5be7 Change MachineBasicBlock's vector of MachineInstr pointers into an 
ilist of MachineInstr objects. This allows constant time removal and
insertion of MachineInstr instances from anywhere in each
MachineBasicBlock. It also allows for constant time splicing of
MachineInstrs into or out of MachineBasicBlocks.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11340 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-12 02:27:10 +00:00
Brian Gaeke
918cdd420b getOpCode() --> getOpcode(). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11339 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-12 01:34:05 +00:00
Brian Gaeke
12c1d2c25a MachineInstr::getOpCode() --> getOpcode() in SPARC back-end. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11335 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-11 20:47:34 +00:00
Chris Lattner
b009c0088c s/getOpCode/getOpcode 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11332 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-11 19:26:28 +00:00
Alkis Evlogimenos
6557262ee7 Increase constness. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11322 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-11 17:55:09 +00:00
Alkis Evlogimenos
f8efea53c2 Remove assert as the only integer registers on the sparc are physical. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11317 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-11 06:04:51 +00:00
Alkis Evlogimenos
af862116df Fix previous broken commit. A MachineOperand may have opType == 
MO_VirtualRegister but if the register number is one of a physical
register is it considered as a physical register.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11315 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-11 05:55:00 +00:00
Alkis Evlogimenos
ccd79f2c21 Remove assert as it is meaningless. MachineOperands can be tagged as 
MO_VirtualRegister but actually be representing a physical register.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11310 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-11 04:52:30 +00:00
Chris Lattner
6565043120 Expose the "Other" value type to tablegen targets 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11304 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-11 03:08:45 +00:00
Chris Lattner
61b08f193a Add #include 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11285 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-10 21:18:55 +00:00
Chris Lattner
9d58a500fc Stop using this method 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11282 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-10 21:12:06 +00:00
Chris Lattner
c31ecb9aae Remove uses of MachineOperand::isVirtualRegister 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11281 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-10 20:55:47 +00:00
Chris Lattner
ebcd7941f0 Remvoe use of MO.isVirtualRegister(), turn an assertion into an assert() 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11280 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-10 20:47:24 +00:00
Chris Lattner
bd0485034c Remove use of isPhysicalRegister 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11277 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-10 20:35:42 +00:00
Chris Lattner
6d21518718 Don't use MachineOperator::is(Phys|Virt)Register 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11276 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-10 20:31:28 +00:00
Chris Lattner
0bbf3052c2 Tighten up checks 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11274 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-10 20:25:13 +00:00
Chris Lattner
21e79cbacd Fix PR228: [sparc] Boolean constants are emitted as true and false 
I will observe that the concept of using WriteAsOperand is completely broken,
but then we all knew that, didn't we?


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11255 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-10 05:16:44 +00:00
Misha Brukman
2647c3925b Doxygenify comments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11252 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-09 23:18:42 +00:00
John Criswell
ccb2a677af Fix PR#226: When emitting padding, always emit it as bytes. Bytes can be 
placed into any alignment situation.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11247 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-09 22:15:33 +00:00
Brian Gaeke
f738db0818 Move InstrSchedule's iterator begin/end methods inline. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11239 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-09 18:42:46 +00:00
Brian Gaeke
0dc5753f2b Make SchedGraph::dump() use SchedGraphNodeCommon's const_iterator 
instead of randomly groping about inside its outEdges array.
Make SchedGraph::addDummyEdges() use getNumOutEdges() instead of
outEdges.size().
Get rid of ifdefed-out code in SchedGraph::buildGraph().


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11238 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-09 18:42:05 +00:00
Chris Lattner
d21cd809b6 Adjust to the changed StructType interface. In particular, getElementTypes() is gone. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11228 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-09 04:37:31 +00:00
Chris Lattner
d5d8996720 Start using the new and improve interface to FunctionType arguments 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11224 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-09 04:14:01 +00:00
Chris Lattner
f6f263ce8c Add a new (hidden) option that is useful for profiling. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11218 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-09 01:47:10 +00:00
Chris Lattner
aeb2a1d708 rename the "exceptional" destination of an invoke instruction to the 'unwind' dest 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11202 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-08 21:44:31 +00:00
Alkis Evlogimenos
14be64018f Modify the two address instruction pass to remove the duplicate 
operand of the instruction and thus simplify the register allocation.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11124 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-04 22:17:40 +00:00
Brian Gaeke
74ceb298fe Take away the default iostream argument of createMachineFunctionPrinterPass(), 
at Chris's request.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11120 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-04 21:41:01 +00:00
Alkis Evlogimenos
f0339396c1 IMULri* instructions do not require their first two registers operands 
to be the same (IOW they are not two address instructions).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11117 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-04 17:21:04 +00:00
Chris Lattner
9f08a92e6c Generate ftst instructions for comparison against zero 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11098 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-03 18:54:04 +00:00
Chris Lattner
3b904eb351 Add the ftst instruction 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11095 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-03 07:27:50 +00:00
Chris Lattner
b97046ae4f Add support for one argument OneArgFP instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11094 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-03 07:27:34 +00:00
Chris Lattner
1580193020 No need to declare implicit uses/defs of ST0 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11081 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-02 19:57:45 +00:00
Chris Lattner
9f8fd6d9ea Generate the fchs instruction to negate a floating point number 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11078 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-02 19:31:38 +00:00
Chris Lattner
4a06f35484 Add support for OneArgFPRW instructions, fix a couple of typeos 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11077 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-02 19:23:15 +00:00
Brian Gaeke
03f84a969c Include PowerPC.h. Flesh out the stub versions of addPassesToEmitAssembly() 
and addPassesToJITCompile() slightly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11076 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-02 19:06:36 +00:00
Brian Gaeke
b77232d1fc Add comments describing how you would add prototypes for factory methods for 
PowerPC-specific passes here.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11073 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-02 19:05:28 +00:00
Chris Lattner
af70362e40 Codegen -0.0 correctly. Do not use fldz! This is another -0.0 == +0.0 problem, arg. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11070 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-02 18:56:30 +00:00
Alkis Evlogimenos
a1b6f95f78 FpMOV is also a move instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11055 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-01 08:22:16 +00:00
Chris Lattner
847df25e7d Add some comments sketching out how this is to work eventually. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11026 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-01-30 22:25:18 +00:00
Chris Lattner
79b13735ad Add a new flag, which is only used for symmetry. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11025 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-01-30 22:24:18 +00:00
Chris Lattner
cf93cdde56 Add (currently disabled) support to the instruction selector to only insert 
FP_REG_KILL instructions at the end of blocks involved with critical edges.

Fix a bug where FP_REG_KILL instructions weren't inserted in fall through
unconditional branches.  Perhaps this will fix some linscan problems?


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11019 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-01-30 22:13:44 +00:00
Brian Gaeke
97374d40d0 Add a new (static inline) std::ostream& << AllocInfo& method. Use it. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11002 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-01-28 19:05:43 +00:00
Brian Gaeke
954e3164be Add the JITInfo object, accessor & initializer. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10972 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-01-23 06:39:30 +00:00
Brian Gaeke
7b0cd6d6cb Add CodeEmitter and JITInfo stubs. Dump the old 
PowerPCTargetMachine::addPassesToJITCompile() method, in favor of the
TargetJITInfo interface.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10971 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-01-23 06:35:43 +00:00
Brian Gaeke
b1b9dc35a7 Build the PowerPC directory, so it is less likely to bit-rot (again) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10938 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-01-21 21:16:10 +00:00
Brian Gaeke
ca78f49234 Import of skeletal PowerPC backend I have had laying around for months... 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10937 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-01-21 21:13:19 +00:00
Tanya Lattner
06723077ed Moved iterators around. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10926 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-01-20 17:51:13 +00:00
Tanya Lattner
a105c802b2 Moved iterators to common file. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10925 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-01-20 17:49:42 +00:00
Misha Brukman
cbbbdf768f Use the LLVM standard name mangling infrastructure instead of reinventing the 
wheel.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10891 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-01-15 22:44:19 +00:00
Brian Gaeke
d011a027e0 Include TargetRegInfo.h and declare SparcTargetMachine forward, to make this 
header more easily includable.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10880 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-01-15 18:17:07 +00:00
Brian Gaeke
0f5918a0b6 Make this assertion more self-explanatory. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10879 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-01-15 18:15:58 +00:00
Chris Lattner
07ad64231f Eliminate the isStringCompatible function, using ConstantArray::isString. 
It's not clear why the code was looking for signed chars < 0, but it can't
matter to the assembler anyway, so the check goes away.  This also fixes
compatibility with arrays of [us]byte that have constantexprs in them.

Also slightly restructure some code to be cleaner.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10854 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-01-14 17:15:17 +00:00
Chris Lattner
aa06d0439e Eliminate the isStringCompatible function, using ConstantArray::isString. 
It's not clear why the code was looking for signed chars < 0, but it can't
matter to the assembler anyway, so the check goes away.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10853 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-01-14 17:14:42 +00:00
Chris Lattner
7446dc0c4f Finegrainify namespacification 
Using the SlotCalculator is total overkill for this file, a simple map
will suffice.  Why doesn't this use the NameMangler interface?


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10823 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-01-13 21:27:59 +00:00
Brian Gaeke
f954326741 Remove dump-input option. 
Make addPassesToEmitAssembly() look slightly more like addPassesToJITCompile().


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10818 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-01-13 19:26:21 +00:00
Chris Lattner
d4d4ab58ef Eliminate use of ConstantHandling itf 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10782 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-01-12 18:08:18 +00:00
Alkis Evlogimenos
f998a7e671 Output mov %REG = 0 instead of xor %REG, %REG, %REG to clear a 
register so that LiveVariable analysis is not confused.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10773 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-01-12 07:22:45 +00:00
Chris Lattner
9982e211ce Move sparc-specific livevar code into lib/Target/Sparc 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10733 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-01-09 18:15:24 +00:00
Chris Lattner
1d415a967b Fix more incestuous #includage. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10732 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-01-09 16:17:09 +00:00
Chris Lattner
46de01e0c8 Move InstrSelection into lib/Target/Sparc, as it's sparc specific. This 
makes the incestuous #include'ing of sparc internal headers much less
disturbing.  :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10729 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-01-09 06:22:34 +00:00
Chris Lattner
75e260990d Move lib/Codegen/RegAlloc into lib/Target/Sparc, as it is sparc specific 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10728 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-01-09 06:17:12 +00:00
Chris Lattner
f70e0c216c Clean up a lot of the code I added yesterday by exposing the IntrinsicLowering 
implementation from the TargetMachine directly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10636 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-12-28 21:23:38 +00:00
Alkis Evlogimenos
5e30002af7 Add TargetInstrInfo::isMoveInstr() to support coalescing in register 
allocation.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10633 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-12-28 17:35:08 +00:00
Chris Lattner
aed386e6b0 Whoops, don't try to lower non intrinsic calls 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10632 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-12-28 09:53:23 +00:00
Chris Lattner
4482715f3d implement support for the intrinsic lowering functionality 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10629 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-12-28 09:47:19 +00:00
Chris Lattner
37b1826aab Eliminate some code that is not needed now that we have the intrinsic lowering pass 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10628 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-12-28 09:46:33 +00:00
Chris Lattner
f8742b3e03 Use the intrinsic lowering functionality 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10626 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-12-28 09:43:35 +00:00
Chris Lattner
f045328dd1 finegrainify namespacification 
add new getIntPtrType() method


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10579 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-12-22 05:01:15 +00:00
Misha Brukman
3615845b3e Really release memory used by functions. Patch by Chris. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10572 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-12-22 03:47:58 +00:00
Alkis Evlogimenos
0ef76cadbb Move FP_REG_KILL closer to the return instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10567 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-12-21 16:47:43 +00:00
Alkis Evlogimenos
9abc81790e Move FP_REG_KILL closer to the actual branch instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10563 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-12-20 17:28:15 +00:00