Commit Graph

111908 Commits

Author SHA1 Message Date
Hans Wennborg
ca71be6415 SimplifyCFG: check uses of constant-foldable instrs in switch destinations (PR20210)
The previous code assumed that such instructions could not have any uses
outside CaseDest, with the motivation that the instruction could not
dominate CommonDest because CommonDest has phi nodes in it. That simply
isn't true; e.g., CommonDest could have an edge back to itself.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225552 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-09 22:13:31 +00:00
Simon Pilgrim
34630b6ea9 [X86][SSE] Avoid vector byte shuffles with zero by using pshufb to create zeros
pshufb can shuffle in zero bytes as well as bytes from a source vector - we can use this to avoid having to shuffle 2 vectors and ORing the result when the used inputs from a vector are all zeroable.

Differential Revision: http://reviews.llvm.org/D6878



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225551 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-09 22:03:19 +00:00
Kevin Enderby
2ca895612c Fix an ASAN failure introduced with r225537 (adding the -universal-headers to llvm-obdump).
And a fly by fix to some formatting issues with the same commit.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225550 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-09 21:55:03 +00:00
Rafael Espindola
64fe6cce3e Add a testcase of llvm-lto error handling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225545 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-09 20:55:09 +00:00
Michael Zolotukhin
b2e5f58de0 Remove duplicating code. NFC.
The removed condition is checked in the previous loop.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225542 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-09 20:36:19 +00:00
Kevin Enderby
6248d1b153 Add the option, -universal-headers, used with -macho to print the Mach-O universal headers to llvm-objdump.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225537 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-09 19:22:37 +00:00
Tim Northover
8cd39a2630 Re-reapply r221924: "[GVN] Perform Scalar PRE on gep indices that feed loads before
doing Load PRE"

It's not really expected to stick around, last time it provoked a weird LTO
build failure that I can't reproduce now, and the bot logs are long gone. I'll
re-revert it if the failures recur.

Original description: Perform Scalar PRE on gep indices that feed loads before
doing Load PRE.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225536 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-09 19:19:56 +00:00
Lang Hames
4c553e0367 Recommit r224935 with a fix for the ObjC++/AArch64 bug that that revision
introduced.

A test case for the bug was already committed in r225385.

Patch by Rafael Espindola.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225534 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-09 18:55:42 +00:00
Duncan P. N. Exon Smith
98e3b1abbf Revert "Bitcode: Move the DEBUG_LOC record to DEBUG_LOC_OLD"
This reverts commit r225498 (but leaves r225499, which was a worthy
cleanup).

My plan was to change `DEBUG_LOC` to store the `MDNode` directly rather
than its operands (patch was to go out this morning), but on reflection
it's not clear that it's strictly better.  (I had missed that the
current code is unlikely to emit the `MDNode` at all.)

Conflicts:
	lib/Bitcode/Reader/BitcodeReader.cpp (due to r225499)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225531 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-09 17:53:27 +00:00
Daniel Sanders
8d7b0bdcf0 [mips] Add support for accessing $gp as a named register.
Summary:
Mips Linux uses $gp to hold a pointer to thread info structure and accesses it
with a named register. This makes this work for LLVM.

The N32 ABI doesn't quite work yet since the frontend generates incorrect IR
for this case. It neglects to truncate the 64-bit GPR to a 32-bit value before
converting to a pointer. Given correct IR (as in the testcase in this patch),
it works correctly.

Reviewers: sstankovic, vmedic, atanasyan

Reviewed By: atanasyan

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D6893

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225529 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-09 17:21:30 +00:00
Sanjay Patel
e730695618 fix typos; remove names from comments; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225528 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-09 17:11:51 +00:00
Sanjay Patel
61478e3bf9 remove names from comments; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225526 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-09 16:47:20 +00:00
Sanjay Patel
a987742b0e fix typos; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225525 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-09 16:35:37 +00:00
Sanjay Patel
46b23a185f fix typo; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225524 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-09 16:29:50 +00:00
Sanjay Patel
b1d136dd4f more efficient use of a dyn_cast; no functional change intended
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225523 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-09 16:28:15 +00:00
Hal Finkel
139bfee84c [PowerPC] Enable late partial unrolling on the POWER7
The P7 benefits from not have really-small loops so that we either have
multiple dispatch groups in the loop and/or the ability to form more-full
dispatch groups during scheduling. Setting the partial unrolling threshold to
44 seems good, empirically, for the P7. Compared to using no late partial
unrolling, this yields the following test-suite speedups:

SingleSource/Benchmarks/Adobe-C++/simple_types_constant_folding
	-66.3253% +/- 24.1975%
SingleSource/Benchmarks/Misc-C++/oopack_v1p8
	-44.0169% +/- 29.4881%
SingleSource/Benchmarks/Misc/pi
	-27.8351% +/- 12.2712%
SingleSource/Benchmarks/Stanford/Bubblesort
	-30.9898% +/- 22.4647%

I've speculatively added a similar setting for the P8. Also, I've noticed that
the unroller does not quite calculate the unrolling factor correctly for really
tiny loops because it neglects to account for the fact that not every loop body
replicant contains an ending branch and counter increment. I'll fix that later.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225522 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-09 15:51:16 +00:00
Toma Tabacu
bdab504afd [mips] Add comment which explains why we need to change the assembler options before and after inline asm blocks. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225521 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-09 15:00:30 +00:00
Suyog Sarda
df970d6297 Assumption that "VectorizedValue" will always be an Instruction is not correct.
It can be a constant or a vector argument.

ex :

define i32 @hadd(<4 x i32> %a) #0 {
entry:
  %vecext = extractelement <4 x i32> %a, i32 0
  %vecext1 = extractelement <4 x i32> %a, i32 1
  %add = add i32 %vecext, %vecext1
  %vecext2 = extractelement <4 x i32> %a, i32 2
  %add3 = add i32 %add, %vecext2
  %vecext4 = extractelement <4 x i32> %a, i32 3
  %add5 = add i32 %add3, %vecext4
  ret i32 %add5
}



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225517 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-09 10:23:48 +00:00
Saleem Abdulrasool
c2a1df7125 ARM: add support for R_ARM_ABS16
Add support for R_ARM_ABS16 relocation mapping.  Addresses PR22156.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225510 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-09 06:57:24 +00:00
Saleem Abdulrasool
466a7dea9b test: add additional test for SVN r225507
Add an additional test case to ensure that we generate the relocation even if
the thumb target is used.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225509 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-09 06:57:18 +00:00
Saleem Abdulrasool
ea4fe48b22 ARM: add support for R_ARM_ABS8 relocations
Add support for R_ARM_ABS8 relocation.  Addresses PR22126.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225507 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-09 05:59:12 +00:00
Matthias Braun
c41acffe22 RegisterCoalescer: Fix removeCopyByCommutingDef with subreg liveness
The code that eliminated additional coalescable copies in
removeCopyByCommutingDef() used MergeValueNumberInto() which internally
may merge A into B or B into A. In this case A and B had different Def
points, so we have to reset ValNo.Def to the intended one after merging.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225503 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-09 03:01:31 +00:00
Matthias Braun
4493e98154 RegisterCoalescer: Some cleanup in removeCopyByCommutingDef(), NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225502 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-09 03:01:28 +00:00
Matthias Braun
fdddd47cc6 RegisterCoalescer: No need to set kill flags, they are recompute later anyway
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225501 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-09 03:01:26 +00:00
Matthias Braun
c25a1509c3 RegisterCoalescer: Turn some impossible conditions into asserts
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225500 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-09 03:01:23 +00:00
Duncan P. N. Exon Smith
acec33834b Bitcode: Share logic for last instruction, NFC
Share logic for getting the last instruction emitted.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225499 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-09 02:51:45 +00:00
Duncan P. N. Exon Smith
97bbaa3227 Bitcode: Move the DEBUG_LOC record to DEBUG_LOC_OLD
Prepare to simplify the `DebugLoc` record.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225498 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-09 02:48:48 +00:00
Hal Finkel
cc7ea4df1e [PowerPC] Add a flag for experimenting with subreg liveness tracking
This cannot yet be enabled by default, it causes ~50 miscompiles in the test
suite.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225497 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-09 02:03:11 +00:00
Hal Finkel
4e98296890 [PowerPC] Fold [sz]ext with fp_to_int lowering where possible
On modern cores with lfiw[az]x, we can fold a sign or zero extension from i32
to i64 into the load necessary for an i64 -> fp conversion.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225493 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-09 01:34:30 +00:00
Hal Finkel
8e1d151abe [DAGCombine] Remainder of fix to r225380 (More FMA folding opportunities)
As pointed out by Aditya (and Owen), when we elide an FP extend to form an FMA,
we need to extend the incoming operands so that the resulting node will really
be legal. This is currently enabled only for PowerPC, and it happens to work
there regardless, but this should fix the functionality for everyone else
should anyone else wish to use it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225492 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-09 01:29:29 +00:00
Chandler Carruth
72dd2f22b5 [x86] Add a flag to control the vector shuffle legality predicates that
complements the new vector shuffle lowering code path. This flag,
naturally, is *off* because we've not tested or evaluated the results of
this at all. However, the flag will make it much easier to evaluate
whether we can be this aggressive and whether there are missing vector
shuffle lowering optimizations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225491 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-09 01:24:36 +00:00
Chandler Carruth
f3c718e49b Cleaup ValueHandle to no longer keep a PointerIntPair for the Value*.
This was used previously for metadata but is no longer needed there. Not
doing this simplifies ValueHandle and will make it easier to fix things
like AssertingVH's DenseMapInfo.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225487 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-09 00:48:47 +00:00
Hal Finkel
40ddb2ce8f Partial fix to r225380 (More FMA folding opportunities)
As pointed out by Aditya (and Owen), there are two things wrong with this code.
First, it adds patterns which elide FP extends when forming FMAs, and that might
not be profitable on all targets (it belongs behind the pre-existing
aggressive-FMA-formation flag). This is fixed by this change.

Second, the resulting nodes might have operands of different types (the
extensions need to be re-added). That will be fixed in the follow-up commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225485 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-09 00:45:54 +00:00
Philip Reames
ce0e12f0b4 [REFACTOR] Push logic from MemDepPrinter into getNonLocalPointerDependency
Previously, MemDepPrinter handled volatile and unordered accesses without involving MemoryDependencyAnalysis.  By making a slight tweak to the documented interface - which is respected by both callers - we can move this responsibility to MDA for the benefit of any future callers.  This is basically just cleanup.

In the future, we may decide to extend MDA's non local dependency analysis to return useful results for ordered or volatile loads.  I believe (but have not really checked in detail) that local dependency analyis does get useful results for ordered, but not volatile, loads.




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225483 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-09 00:26:45 +00:00
Hans Wennborg
d4ca466ed6 ReleaseNotes.rst: these are for 3.6
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225482 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-09 00:21:26 +00:00
Philip Reames
dba2d12578 [Refactor] Have getNonLocalPointerDependency take the query instruction
Previously, MemoryDependenceAnalysis::getNonLocalPointerDependency was taking a list of properties about the instruction being queried. Since I'm about to need one more property to be passed down through the infrastructure - I need to know a query instruction is non-volatile in an inner helper - fix the interface once and for all.

I also added some assertions and behaviour clarifications around volatile and ordered field accesses. At the moment, this is mostly to document expected behaviour. The only non-standard instructions which can currently reach this are atomic, but unordered, loads and stores. Neither ordered or volatile accesses can reach here.

The call in GVN is protected by an isSimple check when it first considers the load. The calls in MemDepPrinter are protected by isUnordered checks. Both utilities also check isVolatile for loads and stores.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225481 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-09 00:04:22 +00:00
Duncan P. N. Exon Smith
cce3a8acec LangRef: Add usage points for distinct MDNodes
Omission pointed out by Sean Silva!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225479 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-08 23:50:26 +00:00
Duncan P. N. Exon Smith
f081ff786f IR: Drop TODO now that PR22111 is finished
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225477 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-08 22:43:19 +00:00
Duncan P. N. Exon Smith
3408708548 Utils: Keep distinct MDNodes distinct in MapMetadata()
Create new copies of distinct `MDNode`s instead of following the
uniquing `MDNode` logic.

Just like self-references (or other cycles), `MapMetadata()` creates a
new node.  In practice most calls use `RF_NoModuleLevelChanges`, in
which case nothing is duplicated anyway.

Part of PR22111.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225476 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-08 22:42:30 +00:00
Duncan P. N. Exon Smith
f416d72973 IR: Add 'distinct' MDNodes to bitcode and assembly
Propagate whether `MDNode`s are 'distinct' through the other types of IR
(assembly and bitcode).  This adds the `distinct` keyword to assembly.

Currently, no one actually calls `MDNode::getDistinct()`, so these nodes
only get created for:

  - self-references, which are never uniqued, and
  - nodes whose operands are replaced that hit a uniquing collision.

The concept of distinct nodes is still not quite first-class, since
distinct-ness doesn't yet survive across `MapMetadata()`.

Part of PR22111.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225474 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-08 22:38:29 +00:00
Sanjay Patel
1cbba214c7 remove function names from comments; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225473 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-08 22:36:56 +00:00
Hal Finkel
b7c01bf403 [PowerPC] Mark all instructions as non-cheap for MachineLICM
MachineLICM uses a callback named hasLowDefLatency to determine if an
instruction def operand has a 'low' latency. If all relevant operands have a
'low' latency, the instruction is considered too cheap to hoist out of loops
even in low-register-pressure situations. On PowerPC cores, both the embedded
cores and the others, there is no reason to believe that this is a good choice:
all instructions have a cost inside a loop, and hoisting them when not limited
by register pressure is a reasonable default.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225471 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-08 22:11:49 +00:00
Hal Finkel
9d1500e68f [MachineLICM] A command-line option to hoist even cheap instructions
Add a command-line option to enable hoisting even cheap instructions (in
low-register-pressure situations). This is turned off by default, but has
proved useful for testing purposes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225470 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-08 22:10:48 +00:00
Duncan P. N. Exon Smith
089a4ba180 CodeGen: Use handy new-fangled post-increment, NFC
Drive-by cleanup; I noticed this when reviewing the patch that became
r225466.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225468 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-08 21:07:55 +00:00
Akira Hatanaka
40cd57eb5c [ARM] Fix a bug in constant island pass that was triggering an assertion.
The assert was being triggered when the distance between a constant pool entry
and its user exceeded the maximally allowed distance after thumb2 branch
shortening. A padding was inserted after a thumb2 branch instruction was shrunk,
which caused the user to be out of range. This is wrong as the padding should
have been inserted by the layout algorithm so that the distance between two
instructions doesn't grow later during thumb2 instruction optimization.

This commit fixes the code in ARMConstantIslands::createNewWater to call
computeBlockSize and set BasicBlock::Unalign when a branch instruction is
inserted to create new water after a basic block. A non-zero Unalign causes
the worst-case padding to be inserted when adjustBBOffsetsAfter is called to
recompute the basic block offsets.

rdar://problem/19130476


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225467 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-08 20:44:50 +00:00
Duncan P. N. Exon Smith
8826cb9526 CodeGen: Use range-based for loops, NFC
Patch by Ramkumar Ramachandra!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225466 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-08 20:44:33 +00:00
Matt Arsenault
3b1f741856 Fix fcmp + fabs instcombines when using the intrinsic
This was only handling the libcall. This is another example
of why only the intrinsic should ever be used when it exists.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225465 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-08 20:09:34 +00:00
Eric Christopher
aa73f89bba The Kaleidoscope tutorial should be using "mcjit" for the library,
"jit" doesn't exist anymore.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225462 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-08 19:07:01 +00:00
Lang Hames
1b3d915de6 [MCJIT] Remove a few redundant MCJIT tests, and drop the extraneous datalayout
strings from the copies that remain.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225460 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-08 18:52:15 +00:00
Eric Christopher
2c470a92e2 Make the TargetMachine in MipsSubtarget a reference rather
than a pointer to make unifying code a bit easier.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225459 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-08 18:18:57 +00:00