llvm-6502

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Commit Graph

Author	SHA1	Message	Date
Dan Gohman	b7c0b246da	Convert more tests to avoid llvm-as. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81545 91177308-0d34-0410-b5e6-96231b3b80d8	2009-09-11 18:36:27 +00:00
Scott Michel	c9c8b2a804	CellSPU: - Rename fcmp.ll test to fcmp32.ll, start adding new double tests to fcmp64.ll - Fix select_bits.ll test - Capitulate to the DAGCombiner and move i64 constant loads to instruction selection (SPUISelDAGtoDAG.cpp). <rant>DAGCombiner will insert all kinds of 64-bit optimizations after operation legalization occurs and now we have to do most of the work that instruction selection should be doing twice (once to determine if v2i64 build_vector can be handled by SelectCode(), which then runs all of the predicates a second time to select the necessary instructions.) But, CellSPU is a good citizen.</rant> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62990 91177308-0d34-0410-b5e6-96231b3b80d8	2009-01-26 03:31:40 +00:00

Author

SHA1

Message

Date

Dan Gohman

b7c0b246da

Convert more tests to avoid llvm-as.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81545 91177308-0d34-0410-b5e6-96231b3b80d8

2009-09-11 18:36:27 +00:00

Scott Michel

c9c8b2a804

CellSPU:

- Rename fcmp.ll test to fcmp32.ll, start adding new double tests to fcmp64.ll
- Fix select_bits.ll test
- Capitulate to the DAGCombiner and move i64 constant loads to instruction
  selection (SPUISelDAGtoDAG.cpp).

  <rant>DAGCombiner will insert all kinds of 64-bit optimizations after
  operation legalization occurs and now we have to do most of the work that
  instruction selection should be doing twice (once to determine if v2i64
  build_vector can be handled by SelectCode(), which then runs all of the
  predicates a second time to select the necessary instructions.) But,
  CellSPU is a good citizen.</rant>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62990 91177308-0d34-0410-b5e6-96231b3b80d8

2009-01-26 03:31:40 +00:00

2 Commits