Commit Graph

106718 Commits

Author SHA1 Message Date
NAKAMURA Takumi
4f8cb33c7a AArch64InstrInfo.cpp: Fix \param(s). [-Wdocumentation]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215180 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-08 02:04:18 +00:00
Anton Yartsev
a6c15843dc [tablegen] - Eliminate memory leaks in TGParser.cpp
Ugly solution indicating that a refactoring is necessary to get the ownership under control.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215176 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-08 00:29:54 +00:00
Adam Nemet
a8e1cda622 [AVX512] Add zero-masking variant to AVX512_masking multiclass
This completes one item from the todo-list of r215125 "Generate masking
instruction variants with tablegen".

The AddedComplexity is needed just like for the k variant.

Added a codegen test based on valignq.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215173 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-07 23:53:38 +00:00
Gerolf Hoflehner
d0f88d5381 Fix for multi-line comment warning
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215169 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-07 23:19:55 +00:00
Adam Nemet
690499ed49 [AVX512] Add codegen test for the masking variant of valign
The AddedComplexity is needed just like in avx512_perm_3src.  There may be a
bug in the complexity computation...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215168 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-07 23:18:18 +00:00
Akira Hatanaka
43f6ce9289 [stack protector] Look through bitcasts to get global variable
__stack_chk_guard.

Handle the case where the pointer operand of the load instruction that loads the
stack guard is not a global variable but instead a bitcast.

%StackGuard = load i8** bitcast (i64** @__stack_chk_guard to i8**)
call void @llvm.stackprotector(i8* %StackGuard, i8** %StackGuardSlot)

Original test case provided by Ana Pazos.

This fixes PR20558.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215167 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-07 23:08:24 +00:00
Adrian Prantl
7f48f056f7 Make these regexes stricter by disallowing any additional characters in the output.
Thanks to dblaikie for pointing this out!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215166 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-07 23:04:07 +00:00
Arnold Schwaighofer
2158dec965 SLPVectorizer: Use the type of the value loaded/stored to get the ABI alignment
We were using the pointer type which is incorrect.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215162 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-07 22:47:27 +00:00
Adrian Prantl
b93c57c0a9 Add a separate testcase for a DWARF expression describing a value in a
subregister.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215161 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-07 22:44:34 +00:00
Adrian Prantl
2ead89ae61 Reflow this comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215160 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-07 22:44:24 +00:00
David Blaikie
263998aa1d DebugInfo: Fix overwriting/loss of inlined arguments to recursively inlined functions.
Due to an unnecessary special case, inlined arguments that happened to
be from the same function as they were inlined into were misclassified
as non-inline arguments and would overwrite the non-inlined arguments.

Assert that we never overwrite a function's arguments, and stop
misclassifying inlined arguments as non-inline arguments to fix this
issue.

Excuse the rather crappy test case - handcrafted IR might do better, or
someone who understands better how to tickle the inliner to create a
recursive inlining situation like this (though it may also be necessary
to tickle the variable in a particular way to cause it to be recorded in
the MMI side table and go down this particular path for location
information).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215157 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-07 22:22:49 +00:00
Reed Kotler
cf76da912c fix materialization of one bit constants and global values which are accessed through
a base GOT entry.

Summary:
get tip of tree mips fast-isel to pass test-suite

Two bugs were fixed:

1) one bit booleans were treated as 1 bit signed integers and so the literal '1' could become sign extended.
2) mips uses got for pic but in certain cases, as with string constants for example, many items can be referenced from the same got entry and this case was not handled properly.

Test Plan: test-suite

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: mcrosier

Differential Revision: http://reviews.llvm.org/D4801

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215155 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-07 22:09:01 +00:00
Eric Christopher
aa5b9c0f6f Temporarily Revert "Nuke the old JIT." as it's not quite ready to
be deleted. This will be reapplied as soon as possible and before
the 3.6 branch date at any rate.

Approved by Jim Grosbach, Lang Hames, Rafael Espindola.

This reverts commits r215111, 215115, 215116, 215117, 215136.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215154 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-07 22:02:54 +00:00
Gerolf Hoflehner
9fbb012404 Debugging Utility - optional ability for dumping critical path length
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215153 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-07 21:49:44 +00:00
Gerolf Hoflehner
e4fa341dde MachineCombiner Pass for selecting faster instruction sequence on AArch64
Re-commit of r214832,r21469 with a work-around that
avoids the previous problem with gcc build compilers

The work-around is to use SmallVector instead of ArrayRef
of basic blocks in preservesResourceLen()/MachineCombiner.cpp



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215151 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-07 21:40:58 +00:00
Kevin Enderby
31dec853c6 Add two missing ARM cpusubtypes to the switch statement in
MachOObjectFile::getArch(uint32_t CPUType, uint32_t CPUSubType) .

Upcoming changes will cause existing test cases to use this but
I wanted to check in this obvious change separately.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215150 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-07 21:30:25 +00:00
Owen Anderson
d4748bbd49 Fix a case in SROA where lifetime intrinsics could inhibit alloca promotion. In
this case, the code path dealing with vector promotion was missing the explicit
checks for lifetime intrinsics that were present on the corresponding integer
promotion path.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215148 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-07 21:07:35 +00:00
Lang Hames
362510890f [MCJIT] Replace a c-style cast with reinterpret_cast + static_cast.
C-style casts (and reinterpret_casts) result in implementation defined
values when a pointer is cast to a larger integer type. On some platforms
this was leading to bogus address computations in RuntimeDyldMachOAArch64.

This should fix http://llvm.org/PR20501.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215143 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-07 20:41:57 +00:00
Richard Smith
c00ae93432 Remove Support/IncludeFile.h and its only user. This is actively harmful, since
it breaks the modules builds (where CallGraph.h can be quite reasonably
transitively included by an unimported portion of a module, and CallGraph.cpp
not linked in), and appears to have been entirely redundant since PR780 was
fixed back in 2008.

If this breaks anything, please revert; I have only tested this with a single
configuration, and it's possible that this is still somehow fixing something
(though I doubt it, since no other similar file uses this mechanism any more).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215142 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-07 20:41:17 +00:00
Rafael Espindola
1f4ef379d2 Fix test failure on ARM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215140 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-07 20:33:06 +00:00
Richard Smith
84c5f9d0fc [modules] Update module map workaround to cope with the problematic file having
been relocated.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215139 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-07 20:27:08 +00:00
Frederic Riss
7d05a0fbc8 test commit: remove trailing whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215138 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-07 20:04:00 +00:00
Rafael Espindola
a7e87a12f9 Remove a few XFAILs.
These tests now pass with MCJIT.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215136 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-07 19:35:22 +00:00
Akira Hatanaka
70b56056a1 [Branch probability] Recompute branch weights of tail-merged basic blocks.
BranchFolderPass was not correctly setting the basic block branch weights when
tail-merging created or merged blocks. This patch recomutes the weights of
tail-merged blocks using the following formula:

branch_weight(merged block to successor j) =
sum(block_frequency(bb) * branch_probability(bb -> j))

bb is a block that is in the set of merged blocks.

<rdar://problem/16256423>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215135 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-07 19:30:13 +00:00
Joerg Sonnenberger
71c5eed711 Add the majority of the remaining SPE instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215131 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-07 18:52:39 +00:00
Justin Bogner
b7c9534f75 FileCheck: Add a flag to allow checking empty input
Currently FileCheck errors out on empty input. This is usually the
right thing to do, but makes testing things like "this command does
not emit some error message" hard to test. This usually leads to
people using "command 2>&1 | count 0" instead, and then the bots that
use guard malloc fail a few hours later.

By adding a flag to FileCheck that allows empty inputs, we can make
tests that consist entirely of "CHECK-NOT" lines feasible.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215127 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-07 18:40:37 +00:00
Joerg Sonnenberger
39637ed35e Indent
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215126 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-07 18:05:32 +00:00
Adam Nemet
c10cecfe69 [AVX512] Generate masking instruction variants with tablegen
After adding the masking variants to several instructions, I have decided to
experiment with generating these from the non-masking/unconditional
variant. This will hopefully reduce the amount repetition that we currently
have in order to define an instruction with all its variants (for a reg/mem
instruction this would be 6 instruction defs and 2 Pat<> for the intrinsic).

The patch is the first cut that is currently only applied to valignd/q to make
the patch small.

A few notes on the approach:

  * In order to stitch together the dag for both the conditional and the
  unconditional patterns I pass the RHS of the set rather than the full
  pattern (set dest, RHS).
  * Rather than subclassing each instruction base class (e.g. AVX512AIi8),
  with a masking variant which wouldn't scale, I derived the masking
  instructions from a new base class AVX512 (this is just I<> with
  Requires<HasAVX512>).  The instructions derive from this now, plus a new set
  of classes that add the format bits and everything else that instruction
  base class provided (i.e. AVX512AIi8 vs. AVX512AIi8Base).

I hope we can go incrementally from here.  I expect that:

  * We will need different variants of the masking class.  One example is
  instructions requiring three vector sources.  In this case we tie one of the
  source operands to dest rather than a new implicit source operand ($src0)
  * Add the zero-masking variant
  * Add more AVX512*Base classes as new uses are added

I've looked at X86.td.expanded before and after to make sure that nothing got
lost for valignd/q.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215125 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-07 17:53:55 +00:00
NAKAMURA Takumi
94287f1561 llvm/test/tools/llvm-objdump: Reorganize target-dependent some tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215122 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-07 17:17:19 +00:00
Rafael Espindola
069468bfb9 Fix the ocaml bindings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215117 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-07 14:48:13 +00:00
Rafael Espindola
7b232e2bb6 fix configure+make build
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215116 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-07 14:38:49 +00:00
Rafael Espindola
93f0670006 Remove empty directories.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215115 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-07 14:25:55 +00:00
Rafael Espindola
875710a2fd Nuke the old JIT.
I am sure we will be finding bits and pieces of dead code for years to
come, but this is a good start.

Thanks to Lang Hames for making MCJIT a good replacement!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215111 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-07 14:21:18 +00:00
Joerg Sonnenberger
7ad7c75048 Add mfasr and mtasr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215110 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-07 13:35:34 +00:00
Joerg Sonnenberger
d94b6e8895 Add mfrtcu and mfrtcl instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215109 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-07 13:16:58 +00:00
Joerg Sonnenberger
5b1fba4a83 Support mttbl and mttbu mnemonic
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215108 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-07 13:06:23 +00:00
Joerg Sonnenberger
80de56ebde Add RFID instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215105 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-07 12:39:59 +00:00
Joerg Sonnenberger
619bacb039 Fix Itineray class of rfi
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215104 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-07 12:35:16 +00:00
Joerg Sonnenberger
46a750b1a0 Spell e500 feature in lower case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215103 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-07 12:31:28 +00:00
Joerg Sonnenberger
445a9f9729 Add first bunch of SPE instructions. As they overlap with Altivec, mark
them as parser-only until the disassembler is extended to handle
predicates properly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215102 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-07 12:18:21 +00:00
Alexander Kornienko
2ca1dd1381 Insert parens to avoid a warning:
suggest parentheses around arithmetic in operand of '^' [-Wparentheses]


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215101 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-07 12:09:34 +00:00
Aaron Ballman
6a85b88e65 Silencing an MSVC C4334 warning ('<<' : result of 32-bit shift implicitly converted to 64 bits (was 64-bit shift intended?)). No functional changes intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215100 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-07 12:07:33 +00:00
Daniel Sanders
6cc2e1a132 [mips] Add assembler support for .set msa/nomsa directive.
Summary:
These directives are used to toggle whether the assembler accepts MSA-specific instructions or not.

Patch by Matheus Almeida and Toma Tabacu.

Reviewers: dsanders

Reviewed By: dsanders

Differential Revision: http://reviews.llvm.org/D4783


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215099 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-07 12:03:36 +00:00
Pavel Chupin
28e06347c9 Fix lld-x86_64-win7 Build #11969
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215097 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-07 11:09:59 +00:00
Chandler Carruth
0e89fbb120 [x86] Fix another miscompile found through fuzz testing the new vector
shuffle lowering.

This is closely related to the previous one. Here we failed to use the
source offset when swapping in the other case -- where we end up
swapping the *final* shuffle. The cause of this bug is a bit different:
I simply wasn't thinking about the fact that this mask is actually
a slice of a wide mask and thus has numbers that need SourceOffset
applied. Simple fix. Would be even more simple with an algorithm-y thing
to use here, but correctness first. =]

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215095 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-07 10:37:35 +00:00
Chandler Carruth
0651861b7b [x86] Fix another miscompile in the new vector shuffle lowering found
via the fuzz tester.

Here I missed an offset when round-tripping a value through a shuffle
mask. I got it right 2 lines below. See a problem? I do. ;] I'll
probably be adding a little "swap" algorithm which accepts a range and
two values and swaps those values where they occur in the range. Don't
really have a name for it, let me know if you do.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215094 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-07 10:14:27 +00:00
Chandler Carruth
b3364512fc [x86] Fix another miscompile in the new vector shuffle lowering found
through the new fuzzer.

This one is great: bad operator precedence led the modulus to happen at
the wrong point. All the asserts didn't fire because there were usually
the right values past the end of the 4 element region we were looking
at. Probably could have gotten a crash here with ASan + fuzzing, but the
correctness tests pinpointed this really nicely.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215092 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-07 09:45:02 +00:00
Pavel Chupin
5d8c984e54 [x32] Use ebp/esp as frame and stack pointer
Summary:
Since pointers are 32-bit on x32 we can use ebp and esp as frame and stack
pointer. Some operations like PUSH/POP and CFI_INSTRUCTION still
require 64-bit register, so using 64-bit MachineFramePtr where required.

X86_64 NaCl uses 64-bit frame/stack pointers, however it's been found that
both isTarget64BitLP64 and isTarget64BitILP32 are true for NaCl. Addressing
this issue here as well by making isTarget64BitLP64 false.

Also mark hasReservedSpillSlot unreachable on X86. See inlined comments.

Test Plan: Add one new simple test and upgrade 2 existing with x32 target case.

Reviewers: nadav, dschuff

Subscribers: llvm-commits, zinovy.nis

Differential Revision: http://reviews.llvm.org/D4617

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215091 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-07 09:41:19 +00:00
Chandler Carruth
15d82b7d33 [x86] Fix a miscompile in the new shuffle lowering found through the new
fuzz testing.

The function which tested for adjacency did what it said on the tin, but
when I called it, I wanted it to do something more thorough: I wanted to
know if the *pairs* of shuffle elements were adjacent and started at
0 mod 2. In one place I had the decency to try to test for this, but in
the other it was completely skipped, miscompiling this test case. Fix
this by making the helper actually do what I wanted it to do everywhere
I called it (and removing the now redundant code in one place).

I *really* dislike the name "canWidenShuffleElements" for this
predicate. If anyone can come up with a better name, please let me know.
The other name I thought about was "canWidenShuffleMask" but is it
really widening the mask to reduce the number of lanes shuffled? I don't
know. Naming things is hard.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215089 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-07 08:11:31 +00:00
Pete Cooper
e216468fef Update Tablegen documents given that binary literals are now sized
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215088 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-07 05:47:13 +00:00