Rafael Espindola
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1e81966626
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Remove arm_apcscc from the test files. It is the default and doing this
matches what llvm-gcc and clang now produce.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106221 91177308-0d34-0410-b5e6-96231b3b80d8
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2010-06-17 15:18:27 +00:00 |
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Benjamin Kramer
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90869455b5
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Eliminate some redundant llvm-as calls.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83837 91177308-0d34-0410-b5e6-96231b3b80d8
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2009-10-12 09:31:55 +00:00 |
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Evan Cheng
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62a1b5db44
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Move load / store multiple before post-alloc scheduling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83236 91177308-0d34-0410-b5e6-96231b3b80d8
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2009-10-02 04:57:15 +00:00 |
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David Goodwin
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471850ab84
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Restore the -post-RA-scheduler flag as an override for the target specification. Remove -mattr for setting PostRAScheduler enable and instead use CPU string.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83215 91177308-0d34-0410-b5e6-96231b3b80d8
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2009-10-01 21:46:35 +00:00 |
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David Goodwin
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0dad89fa94
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Remove -post-RA-schedule flag and add a TargetSubtarget method to enable post-register-allocation scheduling. By default it is off. For ARM, enable/disable with -mattr=+/-postrasched. Enable by default for cortex-a8.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83122 91177308-0d34-0410-b5e6-96231b3b80d8
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2009-09-30 00:10:16 +00:00 |
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David Goodwin
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8971c4a30e
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Post-RA regressions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83075 91177308-0d34-0410-b5e6-96231b3b80d8
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2009-09-29 17:10:26 +00:00 |
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