Justin Holewinski
7e6565112b
[NVPTX] Rename registers %fl -> %fd and %rl -> %rd
...
This matches the internal behavior of NVIDIA tools like libnvvm.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213168 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-16 16:26:58 +00:00
Justin Holewinski
ef0ccc9320
[NVPTX] Clean up comparison/select/convert patterns and factor out PTX instructions from their patterns
...
Test case is no breakage
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185175 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-28 17:58:04 +00:00
Justin Holewinski
1c07dae9fc
[NVPTX] Remove i8 register class. PTX support for i8 (.b8, .u8, .s8) is rather poor and we're better off just ignoring it and letting LLVM expand all i8 ops out to i16.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185174 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-28 17:57:59 +00:00
Justin Holewinski
a20067b5d4
[NVPTX] Implement custom lowering of loads/stores for i1
...
Loads from i1 become loads from i8 followed by trunc
Stores to i1 become zext to i8 followed by store to i8
Fixes PR13291
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167948 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-14 19:19:16 +00:00
