Jim Grosbach
50f8516d2d
Generate more correct debug info for frame indices.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89576 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-22 02:32:29 +00:00
Anton Korobeynikov
1722f061a3
Minor optimization: when doing eq/ne comparions and RHS is a constant - swap operands, this will allow us to fold imm into comparison.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89574 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-22 01:14:08 +00:00
Anton Korobeynikov
ef4e604603
Drop unsupported imm operands
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89573 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-22 01:13:54 +00:00
Anton Korobeynikov
3741be39f9
Use 2-byte alignment for functions. 4 bytes are clear overkill here.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89572 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-22 01:13:39 +00:00
Anton Korobeynikov
3c97fc9ae4
Use semicolon as assembler comment string
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89571 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-22 01:12:49 +00:00
Jim Grosbach
21ce2e3c74
Revert 89562. We're being sneakier than I was giving us credit for, and this
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isn't necessary.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89568 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-21 23:34:09 +00:00
Jim Grosbach
f3b33d0b2a
Darwin requires a frame pointer for all non-leaf functions to support correct
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backtraces.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89562 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-21 21:40:08 +00:00
Evan Cheng
ac0869dc8a
Add predicate operand to NEON instructions. Fix lots (but not all) 80 col violations in ARMInstrNEON.td.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89542 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-21 06:21:52 +00:00
Devang Patel
bef8888a91
We are not using DBG_STOPPOINT anymore.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89536 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-21 02:46:55 +00:00
Viktor Kutuzov
054b52c366
Added two SubtargetFeatures::AddFeatures methods, which accept a comma-separated string or already parsed command line parameters as input, and some code re-factoring to use these new methods.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89516 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-21 00:00:02 +00:00
Dan Gohman
d9e05cd22a
Fix a thinko that caused spurious @GOTOFFs.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89509 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-20 23:30:32 +00:00
Dan Gohman
71a419631f
Update for new getBlockAddress signature.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89507 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-20 23:21:00 +00:00
Dan Gohman
29cbade25a
Target-independent support for TargetFlags on BlockAddress operands,
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and support for blockaddresses in x86-32 PIC mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89506 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-20 23:18:13 +00:00
Sean Callanan
b9e6b34e1e
Recommitting PALIGNR shift width fixes.
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Thanks to Daniel Dunbar for fixing clang intrinsics:
http://llvm.org/viewvc/llvm-project?view=rev&revision=89499
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89500 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-20 22:28:42 +00:00
Dale Johannesen
5ca124691b
Remove an incorrect overaggressive optimization
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(PPC specific).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89496 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-20 22:16:40 +00:00
Sean Callanan
1bbf6d1a6f
Reverting PALIGNR fix until I figure out how this
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broke the Clang testsuite.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89495 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-20 22:09:28 +00:00
Sean Callanan
201dfa7432
Fixed PALIGNR to take 8-bit rotations in all cases.
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Also fixed the corresponding testcase, and the PALIGNR
intrinsic (tested for correctness with llvm-gcc).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89491 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-20 21:40:28 +00:00
Evan Cheng
4aedb61d03
Remat VLDRD from constpool. Clean up some instruction property specifications.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89478 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-20 19:57:15 +00:00
Jim Grosbach
a9562568e5
The verify() call of CPEIsInRange() isn't right for the assertion check of
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constant pool ranges, as CPEIsInRange() makes conservative assumptions about
the potential alignment changes from branch adjustments. The verification,
on the other hand, runs after those branch adjustments are made, so the
effects on alignment are known and already taken into account. The sanity
check in verify should check the range directly instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89473 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-20 19:37:38 +00:00
Jim Grosbach
de8b1dbf95
Remove verifySizes() since it's not adding much value.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89443 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-20 02:32:06 +00:00
Evan Cheng
9b82425cb0
Also CSE non-pic load from constant pools.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89440 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-20 02:10:27 +00:00
Evan Cheng
9ef4835bd8
Fix codegen of conditional move of immediates. We were not making use of the immediate forms of cmov instructions at all.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89423 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-20 00:54:03 +00:00
Eric Christopher
0dde97156c
Update comment to reflect instruction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89414 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-20 00:21:55 +00:00
Jim Grosbach
4d8e90a026
When placing constant islands and adjusting for alignment padding, inline
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assembly can confuse things utterly, as it's assumed that instructions in
inline assembly are 4 bytes wide. For Thumb mode, that's often not true,
so the calculations for when alignment padding will be present get thrown off,
ultimately leading to out of range constant pool entry references. Making
more conservative assumptions that padding may be necessary when inline asm
is present avoids this situation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89403 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-19 23:10:28 +00:00
Evan Cheng
07ba906413
Refactor cmov selection code out to a separate function. No functionality change.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89396 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-19 21:45:22 +00:00
Bill Wendling
fb7634f1c7
Reverting the EH table patches.
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$ svn merge -c -89279 https://llvm.org/svn/llvm-project/llvm/trunk
--- Reverse-merging r89279 into '.':
U lib/CodeGen/AsmPrinter/DwarfException.cpp
U lib/Target/TargetLoweringObjectFile.cpp
$ svn merge -c -89270 https://llvm.org/svn/llvm-project/llvm/trunk
--- Reverse-merging r89270 into '.':
G lib/CodeGen/AsmPrinter/DwarfException.cpp
G lib/Target/TargetLoweringObjectFile.cpp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89379 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-19 19:21:09 +00:00
Johnny Chen
5c376ff9f0
Added NLdStLN which is similar to NLdSt with the exception that op7_4 is not
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fully specified at this level. Subclasses of NLdStLN can specify selective
bit(s) for Inst{7-4}, as is done for VLD[234]LN* and VST[234]LN* inside
ARMInstrNEON.td.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89377 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-19 19:20:17 +00:00
Jim Grosbach
dec6de92d1
fix typo
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89369 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-19 18:23:19 +00:00
Dan Gohman
57474fa0f6
Fix a typo in a comment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89360 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-19 16:35:11 +00:00
Evan Cheng
ed54de40a7
80 col violation.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89337 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-19 08:16:50 +00:00
Evan Cheng
2ef9c8a43d
More consistent thumb1 asm printing.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89328 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-19 06:57:41 +00:00
Evan Cheng
5b397c93a5
Shrink ldr / str [sp, imm0-1024] to 16-bit instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89326 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-19 06:32:27 +00:00
Evan Cheng
a64ce45917
Eliminate more * 4 in Thumb1 asm printing for consistency sake.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89325 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-19 06:31:26 +00:00
Bruno Cardoso Lopes
2045c47aff
- Add sugregister logic to handle f64=(f32,f32).
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- Support mips1 like load/store of doubles:
Instead of:
sdc $f0, X($3)
Generate:
swc $f0, X($3)
swc $f1, X+4($3)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89322 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-19 06:06:13 +00:00
Bruno Cardoso Lopes
0046de0550
Only use small sections for non linux targets!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89316 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-19 05:28:18 +00:00
Bill Wendling
01c69374b5
The "ReadOnlyWithRel" enum seems to apply more to what Darwin does with the EH
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exception table than DataRel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89279 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-19 00:09:14 +00:00
Richard Osborne
bea7df56ce
Add XCore support for indirectbr / blockaddress.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89273 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-18 23:20:42 +00:00
Bill Wendling
ec04458551
Attempt #2 :
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Place the EH table in the __TEXT section on MachO. It saves space.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89270 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-18 23:18:46 +00:00
Viktor Kutuzov
e823db8bae
Added getDefaultSubtargetFeatures method to SubtargetFeatures class which returns a correct feature string for given triple.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89236 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-18 20:20:05 +00:00
David Goodwin
ebb5cb9216
Add ARMv6 itineraries.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89218 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-18 18:39:57 +00:00
Bob Wilson
a3003004aa
Fix a few places that were missed when we converted to unified syntax.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89214 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-18 18:10:35 +00:00
Bob Wilson
834b08af8d
Add a target hook to allow changing the tail duplication limit based on the
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contents of the block to be duplicated. Use this for ARM Cortex A8/9 to
be more aggressive tail duplicating indirect branches, since it makes it
much more likely that they will be predicted in the branch target buffer.
Testcase coming soon.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89187 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-18 03:34:27 +00:00
Bill Wendling
5eea342673
The llvm-gcc front-end and the pass manager use two separate TargetData objects.
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This is probably not confined to *just* these two things.
Anyway, the llvm-gcc front-end may look up the structure layout information for
an abstract type. That information will be stored into a table with the FE's
TD. Instruction combine can come along and also ask for information on that
abstract type, but for a separate TD (the one associated with the pass manager).
After the type is refined, the old structure layout information in the pass
manager's TD file is out of date. If a new type is allocated in the same space
as the old-unrefined type, then the structure type information in the pass
manager's TD file will be wrong, but won't know it.
Fix this by making the TD's structure type information an abstract type user.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89176 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-18 01:03:56 +00:00
Jim Grosbach
f04777b945
Enable arm jumpt table adjustment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89143 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-17 21:24:11 +00:00
Anton Korobeynikov
bce3dbd9be
Both Darwin as and GNU as violate ARM docs wrt printing of addrmode6
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alignment imm (in the same way). Fix asmprinting for non-darwin platforms.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89137 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-17 20:04:59 +00:00
Johnny Chen
a9ea9ec194
Set Inst{15-12} (Rd/Rt) to 0b1111 (PC) for BR_JTadd, BR_JTr, and BR_JTm to
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distinguish between them and the more generic instructions (add, mov, and ldr).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89108 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-17 17:17:50 +00:00
Evan Cheng
d15ac2fce3
Re-apply 89011. It's not to be blamed.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89081 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-17 09:51:18 +00:00
Evan Cheng
6db07eac95
Revert 89011. Buildbot thinks it might be breaking stuff.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89076 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-17 09:20:28 +00:00
Jim Grosbach
a0a95a3c1c
When moving a block for table jumps, make sure the prior block terminator
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is analyzable so it can be updated. If it's not, be safe and don't move the
block.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89022 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-17 01:21:04 +00:00
Evan Cheng
6cccc30679
MOV64rm should be marked isReMaterializable.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89019 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-17 00:55:55 +00:00
Evan Cheng
574186f8ad
A few more instructions that should be marked re-materializable.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89011 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-17 00:23:22 +00:00
Johnny Chen
9d52e8db8a
Set Rm bits of BX_RET to 0b1110 (R14); and set condition code bits of BRIND to
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0b1110 (ALways). This is so that the disassembler decoder can distinguish among
BX_RET, BRIND, and BXr9.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89000 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-16 23:57:56 +00:00
Jeffrey Yasskin
d1ba06bf13
Make X86-64 in the Large model always emit 64-bit calls.
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The large code model is documented at
http://www.x86-64.org/documentation/abi.pdf and says that calls should
assume their target doesn't live within the 32-bit pc-relative offset
that fits in the call instruction.
To do this, we turn off the global-address->target-global-address
conversion in X86TargetLowering::LowerCall(). The first attempt at
this broke the lazy JIT because it can separate the movabs(imm->reg)
from the actual call instruction. The lazy JIT receives the address of
the movabs as a relocation and needs to record the return address from
the call; and then when that call happens, it needs to patch the
movabs with the newly-compiled target. We could thread the call
instruction into the relocation and record the movabs<->call mapping
explicitly, but that seems to require at least as much new
complication in the code generator as this change.
To fix this, we make lazy functions _always_ go through a call
stub. You'd think we'd only have to force lazy calls through a stub on
difficult platforms, but that turns out to break indirect calls
through a function pointer. The right fix for that is to distinguish
between calls and address-of operations on uncompiled functions, but
that's complex enough to leave for someone else to do.
Another attempt at this defined a new CALL64i pseudo-instruction,
which expanded to a 2-instruction sequence in the assembly output and
was special-cased in the X86CodeEmitter's emitInstruction()
function. That broke indirect calls in the same way as above.
This patch also removes a hack forcing Darwin to the small code model.
Without far-call-stubs, the small code model requires things of the
JITMemoryManager that the DefaultJITMemoryManager can't provide.
Thanks to echristo for lots of testing!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88984 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-16 22:41:33 +00:00
Evan Cheng
600c043697
- Check memoperand alignment instead of checking stack alignment. Most load / store folding instructions are not referencing spill stack slots.
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- Mark MOVUPSrm re-materializable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88974 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-16 21:56:03 +00:00
Jim Grosbach
7bde297133
Make the pass class name more explicit.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88964 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-16 21:13:22 +00:00
Jim Grosbach
074fb0252d
make pass name a bit more clear
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88961 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-16 21:03:58 +00:00
Jim Grosbach
08cbda56b6
Simplify thumb2 jump table adjustments. Remove unnecessary calculation and
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usage of block sizes and offsets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88935 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-16 18:58:52 +00:00
Jim Grosbach
9249efe4c7
clarify comment
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88933 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-16 18:55:47 +00:00
Jim Grosbach
b2e86bb142
back off for a bit. tracking down weirdness
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88919 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-16 17:17:48 +00:00
Jim Grosbach
ca215e7804
Analyze has to be before checking the condition, obviously. Properly construct an iterator for prior.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88917 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-16 17:10:56 +00:00
Bruno Cardoso Lopes
add2076c06
Disable ldc1/sdc1 instructions for mips1 targets.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88887 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-16 04:35:29 +00:00
Bruno Cardoso Lopes
6e0b658dad
- Fix a small bug while handling target constant pools (one param was missing).
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- Add a smarter constant pool loading, instead of:
lui $2, %hi($CPI1_0)
addiu $2, $2, %lo($CPI1_0)
lwc1 $f0, 0($2)
Generate:
lui $2, %hi($CPI1_0)
lwc1 $f0, %lo($CPI1_0)($2)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88886 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-16 04:33:42 +00:00
Jim Grosbach
a44321776e
Detect need for autoalignment of the stack earlier to catch spills more
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conservatively. eliminateFrameIndex() machinery adjust to handle addr mode
6 (vld1/vst1) used for spills. Fix tests to expect aligned Q-reg spilling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88874 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-15 21:45:34 +00:00
Jim Grosbach
6cb6788b79
set the def of the VLD1q64 properly
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88873 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-15 21:05:07 +00:00
Nick Lewycky
93f9f7a440
Add a complex missed optimization opportunity I came across while investigating
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bug 5438.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88855 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-15 17:51:23 +00:00
Jim Grosbach
9c477f54f3
cleanup.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88812 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-14 21:33:37 +00:00
Jim Grosbach
00a6a1f022
Cleanup flow, and only update the jump table we're analyzing when replacing a destination MBB.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88805 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-14 20:10:18 +00:00
Richard Osborne
13c4fabf99
Add XCore support for arbitrary-sized aggregate returns.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88802 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-14 19:33:35 +00:00
Anton Korobeynikov
b23f3aa270
Temporary disable the error - it seems to be too conservative.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88800 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-14 18:01:41 +00:00
Daniel Dunbar
067d024b05
Add llvm::sys::getHostCPUName, for detecting the LLVM name for the host CPU.
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- This is an initial step towards -march=native support in Clang, and towards
eliminating host dependencies in the targets. See PR5389.
- Patch by Roman Divacky!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88768 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-14 10:09:12 +00:00
Sanjiv Gupta
9a501cf19d
revert 88761 as it fails builds.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88762 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-14 07:22:25 +00:00
Sanjiv Gupta
6fb01a7750
Fix debug info crashes for PIC16.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88761 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-14 06:19:49 +00:00
Evan Cheng
d57cdd5683
- Change TargetInstrInfo::reMaterialize to pass in TargetRegisterInfo.
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- If destination is a physical register and it has a subreg index, use the
sub-register instead.
This fixes PR5423.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88745 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-14 02:55:43 +00:00
Evan Cheng
0cd22dd738
When expanding t2STRDi8 r, r to two stores, add kill markers correctly.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88734 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-14 01:50:00 +00:00
Jakob Stoklund Olesen
52cd548525
The instruction pointer %RIP is a reserved register on x86_64.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88705 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-13 21:56:01 +00:00
David Greene
1924aabf99
Move DebugInfo checks into EmitComments and remove them from
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target-specific AsmPrinters. Not all comments need DebugInfo.
Re-enable the line numbers comment test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88697 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-13 21:34:57 +00:00
David Goodwin
87d21b92fc
Allow target to specify regclass for which antideps will only be broken along the critical path.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88682 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-13 19:52:48 +00:00
Bruno Cardoso Lopes
a8173b934f
Support fp64 immediate zero, this fixes only part of PR5445
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because the testcase is triggering one more bug.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88674 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-13 18:49:59 +00:00
Dale Johannesen
1e608819aa
Adjust isConstantSplat to allow for big-endian targets.
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PPC is such a target; make it work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@87060 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-13 01:45:18 +00:00
Jim Grosbach
c1a07be185
Block renumbering
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@87056 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-13 01:19:24 +00:00
Jim Grosbach
f4cbc0e421
use lower case for readability
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@87054 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-13 01:17:22 +00:00
David Greene
dda3978d78
Fix a bootstrap failure.
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Provide special isLoadFromStackSlotPostFE and isStoreToStackSlotPostFE
interfaces to explicitly request checking for post-frame ptr elimination
operands. This uses a heuristic so it isn't reliable for correctness.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@87047 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-13 00:29:53 +00:00
David Greene
b9c2fd964e
Make the MachineFunction argument of getFrameRegister const.
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This also fixes a build error.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@87027 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-12 21:00:03 +00:00
David Greene
b87bc95db0
Add hasLoadFromStackSlot and hasStoreToStackSlot to return whether a
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machine instruction loads or stores from/to a stack slot. Unlike
isLoadFromStackSlot and isStoreFromStackSlot, the instruction may be
something other than a pure load/store (e.g. it may be an arithmetic
operation with a memory operand). This helps AsmPrinter determine when
to print a spill/reload comment.
This is only a hint since we may not be able to figure this out in all
cases. As such, it should not be relied upon for correctness.
Implement for X86. Return false by default for other architectures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@87026 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-12 20:55:29 +00:00
David Greene
3f2bf85d14
Add a bool flag to StackObjects telling whether they reference spill
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slots. The AsmPrinter will use this information to determine whether to
print a spill/reload comment.
Remove default argument values. It's too easy to pass a wrong argument
value when multiple arguments have default values. Make everything
explicit to trap bugs early.
Update all targets to adhere to the new interfaces..
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@87022 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-12 20:49:22 +00:00
Benjamin Kramer
05872ea804
Add compare_lower and equals_lower methods to StringRef. Switch all users of
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StringsEqualNoCase (from StringExtras.h) to it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@87020 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-12 20:36:59 +00:00
Jim Grosbach
80697d1b26
Update TB[BH] layout optimization. Add support for moving the target block
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to directly follow the jump table. Move the layout changes to prior to any
constant island handling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86999 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-12 17:25:07 +00:00
Evan Cheng
b9d2c03d20
Use table to separate opcode from operands.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86965 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-12 07:16:34 +00:00
Evan Cheng
06b53c0d51
isLegalICmpImmediate should take a signed integer; code clean up.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86964 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-12 07:13:11 +00:00
Jim Grosbach
01dec0e545
Revert 86857. It's causing consumer-typeset to fail, and there's a better way to do it forthcoming anyway.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86945 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-12 03:28:35 +00:00
Bruno Cardoso Lopes
9089ba8e5e
A real solution for the first part of PR5445
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86895 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-11 23:09:33 +00:00
Evan Cheng
77e4751011
Add TargetLowering::isLegalICmpImmediate. It tells LSR what immediate can be folded into target icmp instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86858 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-11 19:05:52 +00:00
Jim Grosbach
f4997e87e3
Do jump table adjustment before constant island allocation
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86857 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-11 19:04:24 +00:00
Dan Gohman
adaace8aa8
Set isBarrier = 1 on return instructions, as they are control barriers.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86851 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-11 18:11:07 +00:00
Dan Gohman
e94975ee64
Use a tab in INT3's asm string, for consistency.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86850 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-11 18:07:16 +00:00
Chris Lattner
fc926c2395
another const prop failure.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86848 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-11 17:54:02 +00:00
Chris Lattner
6fdfc9c630
add a note
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86847 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-11 17:51:27 +00:00
Jim Grosbach
1fc7d715aa
The TBB and TBH instructions for Thumb2 are really handy for jump tables, but
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can only branch forward. To best take advantage of them, we'd like to adjust
the basic blocks around a bit when reasonable. This patch puts basics in place
to do that, with a super-simple algorithm for backwards jump table targets that
creates a new branch after the jump table which branches backwards. Real
heuristics for reordering blocks or other modifications rather than inserting
branches will follow.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86791 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-11 02:47:19 +00:00
Daniel Dunbar
253e9b2990
llvm-gcc/clang don't (won't?) need this hack.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86769 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-11 00:28:38 +00:00
Chris Lattner
1742498b5a
add a note
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86756 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-10 23:47:45 +00:00
Chris Lattner
b6ad9153dd
I did this a week or two ago
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86754 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-10 23:40:49 +00:00
Dan Gohman
5b37fbac1a
Don't mark conditional branch instructions as control barriers.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86732 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-10 22:16:57 +00:00
Bill Wendling
b19a5e9be6
Modify how the prologue encoded the "move" information for the FDE. GCC
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generates a sequence similar to this:
__Z4funci:
LFB2:
mflr r0
LCFI0:
stmw r30,-8(r1)
LCFI1:
stw r0,8(r1)
LCFI2:
stwu r1,-80(r1)
LCFI3:
mr r30,r1
LCFI4:
where LCFI3 and LCFI4 are used by the FDE to indicate what the FP, LR, and other
things are. We generated something more like this:
Leh_func_begin1:
mflr r0
stw r31, 20(r1)
stw r0, 8(r1)
Llabel1:
stwu r1, -80(r1)
Llabel2:
mr r31, r1
Note that we are missing the "mr" instruction. This patch makes it more like the
GCC output.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86729 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-10 22:14:04 +00:00
Evan Cheng
4b6bbe1e9c
Change Thumb1 address mode printing, instead of
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[r0, #2 * 4]
Now
[r0, #8 ]
This makes Thumb2 assembly more uniform and frankly the scale doesn't add much.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86707 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-10 19:48:13 +00:00
Evan Cheng
1e13c797e5
Add a comment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86706 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-10 19:44:56 +00:00
Daniel Dunbar
5da58851e5
Add a monstrous hack to improve X86ISelDAGToDAG compile time.
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- Force NDEBUG on in any Release build. This drops the compile time to ~100s
from ~600s, in Release mode.
- This may just be a temporary workaround, I don't know the true nature of the
gcc-4.2 compile time performance problem.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86695 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-10 18:24:37 +00:00
Bruno Cardoso Lopes
734516d1f6
Fix PR5445
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86651 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-10 02:35:13 +00:00
Jeffrey Yasskin
81cf432569
Fix DenseMap iterator constness.
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This patch forbids implicit conversion of DenseMap::const_iterator to
DenseMap::iterator which was possible because DenseMapIterator inherited
(publicly) from DenseMapConstIterator. Conversion the other way around is now
allowed as one may expect.
The template DenseMapConstIterator is removed and the template parameter
IsConst which specifies whether the iterator is constant is added to
DenseMapIterator.
Actually IsConst parameter is not necessary since the constness can be
determined from KeyT but this is not relevant to the fix and can be addressed
later.
Patch by Victor Zverovich!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86636 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-10 01:02:17 +00:00
David Goodwin
c2e8a7e8d2
Fixed to address code review. No functional changes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86634 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-10 00:48:55 +00:00
David Goodwin
0855dee564
Allow targets to specify register classes whose member registers should not be renamed to break anti-dependencies.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86628 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-10 00:15:47 +00:00
Jim Grosbach
803b48a155
Now that the default is 'enabled,' a separate command line option for ARM is
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not necessary.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86621 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-09 23:11:45 +00:00
Jim Grosbach
92eb919e80
Enable dynamic stack realignment by default.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86604 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-09 22:32:40 +00:00
Jim Grosbach
ad353c74ad
Set dynamic stack realignment to real values.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86602 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-09 22:32:03 +00:00
Bill Wendling
2718e43d6a
Similar to r86588, but for Darwin this time.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86592 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-09 21:45:26 +00:00
Bill Wendling
b1ec31d711
The jump table was being generated before the end label for exception handling
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was generated. This caused code like this:
## The asm code for the function
.section __TEXT,__const
.align 2
lJTI11_0:
LJTI11_0:
.long LBB11_16
.long LBB11_4
.long LBB11_5
.long LBB11_6
.long LBB11_7
.long LBB11_8
.long LBB11_9
.long LBB11_10
.long LBB11_11
.long LBB11_12
.long LBB11_13
.long LBB11_14
Leh_func_end11: ## <---now in the wrong section!
The `Leh_func_end11' would then end up in the wrong section, causing the
resulting EH frame information to be wrong:
__ZL11CheckRightsjPKcbRbRP6NSData.eh:
.set Lset500eh,Leh_frame_end11-Leh_frame_begin11
.long Lset500eh ; Length of Frame Information Entry
Leh_frame_begin11:
.long Leh_frame_begin11-Leh_frame_common
.long Leh_func_begin11-.
.set Lset501eh,Leh_func_end11-Leh_func_begin11
.long Lset501eh ; FDE address range
`Lset501eh' is now something huge instead of the real value.
The X86 back-end generates the jump table after the EH information is
emitted. Do the same here.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86588 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-09 21:20:14 +00:00
Jim Grosbach
43cca695a8
Work around assembler not recognizing #0.0 form immediate for vmcp
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86548 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-09 15:27:51 +00:00
Bruno Cardoso Lopes
b8e0ebf034
Fix PR5149.
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http://llvm.org/bugs/show_bug.cgi?id=5149
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86543 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-09 14:27:49 +00:00
Jim Grosbach
e5165490b7
Use Unified Assembly Syntax for the ARM backend.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86494 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-09 00:11:35 +00:00
Anton Korobeynikov
f0b47b7f6d
Add and-not (bic) patterns. Based heavily on patch by Brian Lucas!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86471 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-08 15:33:12 +00:00
Anton Korobeynikov
830fe7bc2d
Move OR patterns upper to all logical stuff. No functionality change.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86470 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-08 15:32:44 +00:00
Anton Korobeynikov
ff2c186d59
Some nice peephole patterns. Based on patch by Brian Lucas!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86469 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-08 15:32:28 +00:00
Anton Korobeynikov
764cfaabd2
Print tab before operand of jcc
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86468 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-08 15:32:11 +00:00
Anton Korobeynikov
52f28e9b63
Fix invalid operand updates & implement post-inc memory operands
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86466 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-08 14:27:38 +00:00
Anton Korobeynikov
773943ac5c
Throw an error when stack realignment stuff fails instead of silent
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code miscompilation
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86463 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-08 12:58:40 +00:00
Chris Lattner
7e89738f98
Make TargetData::getStringRepresentation spit out native integer types,
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this gives llvm-gcc generated modules the right data.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86435 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-08 02:32:01 +00:00
Jim Grosbach
31bc849123
Use aligned load/store instructions for spilling Q registers when we know the stack slot is 128 bit aligned
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86425 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-08 00:27:19 +00:00
Evan Cheng
fdc834046e
Refactor code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86423 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-08 00:15:23 +00:00
Nate Begeman
0b10b91465
x86 vector shuffle cleanup/fixes:
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1. rename the movhp patfrag to movlhps, since thats what it actually matches
2. eliminate the bogus movhps load and store patterns, they were incorrect. The load transforms are already handled (correctly) by shufps/unpack.
3. revert a recent test change to its correct form.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86415 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-07 23:17:15 +00:00
Jim Grosbach
31c24bf5b3
80-column cleanup of file header comments
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86408 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-07 22:00:39 +00:00
Jim Grosbach
8a5ec86a3d
Support alignment specifier for NEON vld/vst instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86404 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-07 21:25:39 +00:00
Nick Lewycky
f80fcd00b3
Improve tail call elimination to handle the switch statement.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86403 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-07 21:10:15 +00:00
Evan Cheng
bf992817f2
t2ldrpci_pic can be used for blockaddress as well.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86400 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-07 19:40:04 +00:00
Chris Lattner
59a9178fbe
indicate what the native integer types for the target are.
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Please verify.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86397 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-07 19:07:32 +00:00
Anton Korobeynikov
06ac0820a6
First try of the post-inc operands handling... Not fully worked, though :(
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86386 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-07 17:15:25 +00:00
Anton Korobeynikov
6534f83ae8
Add some dummy support for post-incremented loads
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86385 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-07 17:15:06 +00:00
Anton Korobeynikov
8983da729a
Add 8 bit libcalls and make use of them for msp430
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86384 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-07 17:14:39 +00:00
Anton Korobeynikov
8046ef4379
Add few pseudo-source-values
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86383 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-07 17:13:57 +00:00
Anton Korobeynikov
123ed8f099
Initial support for addrmode handling. Tests by Brian Lucas!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86382 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-07 17:13:35 +00:00
Anton Korobeynikov
603fce9ebb
Some preliminary variable asmprinting
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86381 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-07 17:12:58 +00:00
Anton Korobeynikov
5c192fbe45
Use '.L' for global private prefix (as mspgcc)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86380 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-07 17:12:38 +00:00
Anton Korobeynikov
b7790e11c4
Drop old asmprinter stuff
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86379 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-07 17:12:21 +00:00
Anton Korobeynikov
e8ea011cc7
It turns out that the testcase in question uncovered subreg-handling bug.
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Add assert in asmprinter to catch such cases and xfail the tests.
PR is to be filled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86375 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-07 15:20:32 +00:00
Chris Lattner
e82bdc4809
add the ability for TargetData to return information about legal integer
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datatypes on a given CPU. This is intended to allow instcombine and other
transformations to avoid converting big sequences of operations to an
inconvenient width, and will help clean up after SRoA. See also "Adding
legal integer sizes to TargetData" on Feb 1, 2009 on llvmdev, and PR3451.
Comments welcome.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86370 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-07 09:35:34 +00:00
Chris Lattner
2e07494170
more cleanup.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86369 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-07 09:23:04 +00:00
Chris Lattner
8f9b0f6e88
add some missing #includes
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86367 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-07 09:20:54 +00:00
Chris Lattner
b7aadfac5e
rewrite TargetData to use StringRef/raw_ostream instead of thrashing std::strings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86366 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-07 09:13:23 +00:00
Jeffrey Yasskin
2d274412ed
Make the need-stub variables accurate and consistent. In the case of
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MachineRelocations, "stub" always refers to a far-call stub or a
load-a-faraway-global stub, so this patch adds "Far" to the term. (Other stubs
are used for lazy compilation and dlsym address replacement.) The variable was
also inconsistent between the positive and negative sense, and the positive
sense ("NeedStub") was more demanding than is accurate (since a nearby-enough
function can be called directly even if the platform often requires a stub).
Since the negative sense causes double-negatives, I switched to
"MayNeedFarStub" globally.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86363 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-07 08:51:52 +00:00
Eric Christopher
761411c21b
Fix a couple of shuffle patterns to use movhlps instead
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of movhps as the constraint. Changes optimizations so
update testcases as appropriate as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86360 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-07 08:45:53 +00:00
Mon P Wang
0ace1a9f30
Fixed Overload table bug noticed by Jakob
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86332 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-07 04:07:33 +00:00
Evan Cheng
d457e6e9a5
Refactor code. Fix a potential missing check. Teach isIdentical() about tLDRpci_pic.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86330 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-07 04:04:34 +00:00
Evan Cheng
78e5c1140a
- Add TargetInstrInfo::isIdentical(). It's similar to MachineInstr::isIdentical
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except it doesn't care if the definitions' virtual registers differ. This is
used by machine LICM and other MI passes to perform CSE.
- Teach Thumb2InstrInfo::isIdentical() to check two t2LDRpci_pic are identical.
Since pc relative constantpool entries are always different, this requires it
it check if the values can actually the same.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86328 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-07 03:52:02 +00:00
Ted Kremenek
b6aae88ac0
Update CMake file.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86325 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-07 03:26:59 +00:00
Kenneth Uildriks
b4997aeab7
Add code to check at SelectionDAGISel::LowerArguments time to see if return values can be lowered to registers. Coming soon, code to perform sret-demotion if return values cannot be lowered to registers
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86324 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-07 02:11:54 +00:00
Johnny Chen
0430152a11
My previous patch (r84124) for setting the encoding bits 4 and 7 of DPSoRegFrm
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was wrong and too aggressive in the sense that DPSoRegFrm includes both constant
shifts (with Inst{4} = 0) and register controlled shifts (with Inst{4} = 1 and
Inst{7} = 0). The 'rr' fragment of the multiclass definitions actually means
register/register with no shift, see A8-11.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86319 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-07 00:54:36 +00:00
Jim Grosbach
bd79fc8ef2
80-columns
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86310 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-07 00:13:30 +00:00
Evan Cheng
b9803a8fa6
- Add pseudo instructions tLDRpci_pic and t2LDRpci_pic which does a pc-relative
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load of a GV from constantpool and then add pc. It allows the code sequence to
be rematerializable so it would be hoisted by machine licm.
- Add a late pass to break these pseudo instructions into a number of real
instructions. Also move the code in Thumb2 IT pass that breaks up t2MOVi32imm
to this pass. This is done before post regalloc scheduling to allow the
scheduler to proper schedule these instructions. It also allow them to be
if-converted and shrunk by later passes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86304 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-06 23:52:48 +00:00
Anton Korobeynikov
fc2cba8362
Honour subreg machine operands during asmprinting
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86303 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-06 23:45:15 +00:00
Bob Wilson
54c78ef2fe
Print VMOV (immediate) operands as hexadecimal values. Apple's assembler
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will not accept negative values for these. LLVM's default operand printing
sign extends values, so that valid unsigned values appear as negative
immediates. Print all VMOV immediate operands as hex values to resolve this.
Radar 7372576.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86301 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-06 23:33:28 +00:00
Evan Cheng
e7e0d62efd
Remove ARMPCLabelIndex from ARMISelLowering. Use ARMFunctionInfo::createConstPoolEntryUId() instead.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86294 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-06 22:24:13 +00:00
Daniel Dunbar
2928c83b01
Pass StringRef by value.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86251 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-06 10:58:06 +00:00
Dan Gohman
40c57860da
Factor out the printing of the leading tab into printInlineAsm.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86199 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-06 00:04:54 +00:00
Dan Gohman
7289ed2ee7
Use SUBREG_TO_REG instead of INSERT_SUBREG to model x86-64's
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implicit zero-extend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86196 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-05 23:53:08 +00:00
Dan Gohman
73bb251cd7
Remove uninteresting and confusing debug output.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86149 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-05 18:47:09 +00:00
Chris Lattner
6c9fab7404
add a note from PR5313
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86146 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-05 18:19:19 +00:00
Mon P Wang
82c443655d
Reintroduce support for overloading target intrinsics
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86114 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-05 03:19:08 +00:00
Jim Grosbach
4371cda7f8
Grammar.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86068 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-04 23:20:40 +00:00
Jim Grosbach
db1751a922
Now that the memory leak from McCat/08-main has been fixed (86056), re-enable
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aggressive testing of dynamic stack alignment.
Note that this is off by default, and enabled for LLCBETA nightly results.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86064 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-04 23:11:07 +00:00
Jim Grosbach
6db06a0866
If a function has no stack frame at all, dynamic realignment isn't necessary.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86057 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-04 22:41:51 +00:00
Jim Grosbach
c5848f4ced
dynamic stack realignment necessitates scanning the floating point callee-
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saved instructions even if no stack adjustment for those saves is needed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86056 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-04 22:41:00 +00:00
Bob Wilson
3d90dbee69
Add PowerPC codegen for indirect branches.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86050 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-04 21:31:18 +00:00
Jakob Stoklund Olesen
ad68264f59
Print out an informative comment for KILL instructions.
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The KILL pseudo-instruction may survive to the asm printer pass, just like the IMPLICIT_DEF. Print the KILL as a comment instead of just leaving a blank line in the output.
With -asm-verbose=0, a blank line is printed, like IMPLICIT?DEF.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86041 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-04 19:24:37 +00:00
Evan Cheng
b9f51cbe98
The .n suffix must go after the predicate.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86019 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-04 07:38:48 +00:00
Evan Cheng
7883fa942f
Use ldr.n to workaround a darwin assembler bug.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85980 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-04 00:00:39 +00:00
Evan Cheng
5a1cd36019
Fix t2Int_eh_sjlj_setjmp. Immediate form of orr is a 32-bit instruction. So it should be 22 bytes instead of 20 bytes long.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85965 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-03 23:13:34 +00:00
Evan Cheng
b23b2015eb
fconsts / fconstd immediate should be proceeded with #.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85952 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-03 21:59:33 +00:00
Anton Korobeynikov
747409a290
Move subtarget check upper for NEON reg-reg fixup pass.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85914 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-03 18:46:11 +00:00
Evan Cheng
f6c0bffa8d
Trim unnecessary include.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85878 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-03 07:08:08 +00:00
Bob Wilson
af14e663ac
For Thumb indirect branches, use "mov pc, reg" which does not switch
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between ARM/Thumb modes and does not require the low bit of the target
address to be set for Thumb.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85874 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-03 06:29:56 +00:00
Evan Cheng
ba908640b3
Fix PR5367. QPR_8 is the super regclass of DPR_8 and SPR_8.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85871 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-03 05:52:54 +00:00
Evan Cheng
b4db6a46e0
Clean up copyRegToReg.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85870 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-03 05:51:39 +00:00
Evan Cheng
3f4e47be0a
Add QPR_8 as a superreg class of SPR_8 and DPR_8.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85869 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-03 05:50:57 +00:00
Ted Kremenek
92dbd0b320
Update CMake file.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85861 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-03 04:14:12 +00:00
Anton Korobeynikov
7aaf94bb0d
Turn neon reg-reg moves fixup code into separate pass. This should reduce the compile time.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85850 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-03 01:04:26 +00:00
Anton Korobeynikov
ab453e0641
Revert r85049, it is causing PR5367
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85847 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-03 00:24:48 +00:00
Bob Wilson
b62d257cf5
Revert previous change to a comment. The BlockAddresses go in the
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constant pool so they don't get wrapped separately.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85844 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-03 00:02:05 +00:00
Bob Wilson
907eebd5a6
Put BlockAddresses into ARM constant pools.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85824 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-02 20:59:23 +00:00
Kevin Enderby
60131c0d0b
Fix ARMAsmParser::ParseMemoryOffsetReg() where the parameter OffsetRegNum should
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have been passed as a reference.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85823 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-02 20:14:39 +00:00
David Goodwin
2f54a2fd85
Fix schedule model for BFC.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85809 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-02 17:28:36 +00:00
Bob Wilson
31ba10b743
Hyphenate some comments.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85808 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-02 17:10:37 +00:00
Bob Wilson
28989a8ddc
Add support for BlockAddress values in ARM constant pools.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85806 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-02 16:59:06 +00:00
Bob Wilson
69e8445ced
Prune unnecessary include.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85805 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-02 16:58:31 +00:00
Evan Cheng
d3e18fad7e
These are done / no longer care.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85798 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-02 07:58:25 +00:00
Evan Cheng
e3b88fc01e
Add an entry.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85797 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-02 07:51:19 +00:00
Evan Cheng
7baae87d8f
Unbreak ARMBaseRegisterInfo::copyRegToReg.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85787 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-02 04:44:55 +00:00
Anton Korobeynikov
2ae0eec1c0
Handle splats of undefs properly. This includes the testcase for PR5364 as well.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85767 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-02 00:12:06 +00:00
Anton Korobeynikov
3a639a07ea
Do not infer the target type for COPY_TO_REGCLASS from dest regclass, this won't work if it can contain several types. Require explicit result type for the node for now. This fixes PR5364.
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PS: It seems that blackfin usage of copy_to_regclass is completely bogus!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85766 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-02 00:11:39 +00:00
Anton Korobeynikov
2e1da9fea4
64-bit FP loads & stores operate on both NEON and VFP pipelines.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85765 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-02 00:11:06 +00:00
Anton Korobeynikov
f95215f551
Use NEON reg-reg moves, where profitable. This reduces "domain-cross" stalls, when we used to mix vfp and neon code (the former were used for reg-reg moves)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85764 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-02 00:10:38 +00:00
Evan Cheng
e3ce8aab0a
Fix a couple more places where we are creating ld / st instructions without memoperands.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85746 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-01 22:04:35 +00:00
Evan Cheng
48d8afab73
Make use of imm12 version of Thumb2 ldr / str instructions more aggressively.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85743 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-01 21:12:51 +00:00