Commit Graph

107028 Commits

Author SHA1 Message Date
Toma Tabacu
109447ff1b [mips] Add assembler support for .set arch=x directive.
Summary:
This directive is similar to ".set mipsX".
It is used to change the CPU target of the assembler, enabling it to accept instructions for a specific CPU.

This patch only implements the r4000 CPU (which is treated internally as generic mips3) and the generic ISAs.

Contains work done by Matheus Almeida.

Reviewers: dsanders

Reviewed By: dsanders

Differential Revision: http://reviews.llvm.org/D4884

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215978 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-19 14:22:52 +00:00
Mayur Pandey
ecdb0ab90f InstCombine: ((A & ~B) ^ (~A & B)) to A ^ B
Proof using CVC3 follows:
$ cat t.cvc
A, B : BITVECTOR(32);
QUERY BVXOR((A & ~B),(~A & B)) = BVXOR(A,B);
$ cvc3 t.cvc
Valid.

Differential Revision: http://reviews.llvm.org/D4898


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215974 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-19 08:19:19 +00:00
Craig Topper
7ce4ac12fc Const-correct and prevent a copy of a SmallPtrSet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215973 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-19 07:44:27 +00:00
Craig Topper
25fc910167 Prevent use of the implicit copy constructor on SmallPtrSetImpl. An accidental copy caused my SmallPtrSet->SmallPtrSetImpl conversion commit to fail the other day.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215971 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-19 06:57:14 +00:00
Mayur Pandey
be63d58963 test commit (spelling correction)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215970 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-19 06:41:55 +00:00
Rafael Espindola
3f4ed32b43 Make it explicit that ExecutionEngine takes ownership of the modules.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215967 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-19 04:04:25 +00:00
Duncan P. N. Exon Smith
4d48c3f2a4 IR: Reduce RAUW traffic in ConstantVector
Avoid creating a new `ConstantVector` on an RAUW of one of its members.
This reduces RAUW traffic on any containing constant.

This is part of PR20515.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215966 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-19 02:24:46 +00:00
Duncan P. N. Exon Smith
3b666f3b59 IR: Fix ConstantArray::replaceUsesOfWithOnConstant()
Previously, `ConstantArray::replaceUsesOfWithOnConstant()` neglected to
check whether it becomes a `ConstantDataArray`.  Call
`ConstantArray::getImpl()` to check for that.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215965 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-19 02:21:00 +00:00
Duncan P. N. Exon Smith
6238162cc5 IR: Factor out replaceUsesOfWithOnConstantImpl(), NFC
Factor out common code, and take advantage of the new function to
add early returns to the callers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215964 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-19 02:16:51 +00:00
Duncan P. N. Exon Smith
45d53fd4c4 IR: Split up Constant{Array,Vector}::get(), NFC
Introduce `getImpl()` that tries the simplification logic from `get()`
and then gives up.  This allows the logic to be reused elsewhere in a
follow-up commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215963 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-19 02:11:30 +00:00
Akira Hatanaka
6290308366 [X86, X87 stackifier] Do not mark an operand of a debug instruction as kill.
<rdar://problem/16952634>



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215962 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-19 02:09:57 +00:00
Duncan P. N. Exon Smith
1cfbb6358c IR: Reduce RAUW traffic in ConstantExpr
Avoid RAUW-ing `ConstantExpr` when an operand changes unless the new
`ConstantExpr` already has users.  This prevents the RAUW from rippling
up the expression tree unnecessarily.

This commit indirectly adds test coverage for r215953 (this is how I
came across the bug).

This is part of PR20515.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215960 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-19 01:12:53 +00:00
Duncan P. N. Exon Smith
fe0bf8fbf9 IR: Replace uses of ConstantAggrUniqueMap with ConstantUniqueMap
Now that `ConstantAggrUniqueMap` and `ConstantUniqueMap` work the same
way, change the aggregates to use the new one.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215959 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-19 01:02:18 +00:00
Duncan P. N. Exon Smith
f2534dd8b9 Remove extraneous typenames from r215957
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215958 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-19 00:55:34 +00:00
Duncan P. N. Exon Smith
78c0b35bf7 IR: Rewrite ConstantUniqueMap
Rewrite `ConstantUniqueMap` to be more similar to
`ConstantAggrUniqueMap`.

  - Use a `DenseMap` with custom MapInfo instead of a `std::map` with
    linear lookups and deletion.
  - Don't waste memory explicitly storing (heavyweight) keys.

Only `ConstantExpr` and `InlineAsm` actually use this data structure, so
I also updated them to use it.

This code cleanup is a precursor to reducing RAUW traffic on
`ConstantExpr` -- I felt badly adding a new (linear) call to
`ConstantUniqueMap::FindExistingKey`, so this designs away the concern.

A follow-up commit will transition the users of `ConstantAggrUniqueMap`
over.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215957 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-19 00:42:32 +00:00
Duncan P. N. Exon Smith
79f9f85c04 IR: Declare LookupKey right before its use, NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215956 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-19 00:24:26 +00:00
Duncan P. N. Exon Smith
fd0a8133e5 IR: ArrayRef-ize {Insert,Extract}ValueConstantExpr constructors
No functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215955 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-19 00:23:17 +00:00
Duncan P. N. Exon Smith
783d16f0b7 Prevent clang-format from moving the namespace closing brace, NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215954 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-19 00:21:04 +00:00
Duncan P. N. Exon Smith
6b863256e4 NVPTX: Use RAUW instead of reinventing the wheel
This code had a homemade RAUW that was incorrect when a user was a
constant: instead of calling `replaceUsersWithOnConstant()` it would
incorrectly update the operand in-place, invalidating
`LLVMContextImpl::ExprConstants`.  RAUW does the job better.

The ValueHandle that `GVMap` is holding onto needs to be removed first,
so this commit also removes each variable from the map on-the-fly.

Since deletions from `ExprConstants` use a linear search that compares
directly on the pointer value (instead of using the key), there isn't an
obvious way to expose this with a testcase.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215953 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-19 00:20:02 +00:00
Duncan P. N. Exon Smith
165897841b LLParser: Handle BlockAddresses on-the-fly
Previously all `blockaddress()` constants were treated as forward
references.  They were resolved twice:  once at the end of the function
in question, and again at the end of the module.  Furthermore, if the
same blockaddress was referenced N times, the parser created N distinct
`GlobalVariable`s (one for each reference).

Instead, resolve all block addresses at the beginning of the function,
creating the standard `BasicBlock` forward references used for all other
basic block references.  After the function, all references can be
resolved immediately.  To check for the condition of parsing block
addresses from within the same function, I created a reference to the
current per-function-state in `BlockAddressPFS`.

Also, create only one forward-reference per basic block.  Because
forward references to block addresses are rare, the data structure here
shouldn't matter.  If somehow it does someday, this can be pretty easily
changed to a `DenseMap<std::pair<ValID, ValID>, GV>`.

This is part of PR20515.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215952 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-19 00:13:19 +00:00
Duncan P. N. Exon Smith
36c150801a verify-uselistorder: Call verifyModule() and improve output
Call `verifyModule()` after parsing and after every transformation.
Also convert some `DEBUG(dbgs())` to `errs()` to increase visibility
into what's going on.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215951 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-18 23:44:14 +00:00
Rafael Espindola
f359f7ef8c Use a range loop. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215948 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-18 23:15:59 +00:00
Rafael Espindola
0282239051 These classes only need a StringRef, not a MemoryBuffer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215945 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-18 22:28:28 +00:00
Rafael Espindola
285133714f Delete unused method.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215944 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-18 22:20:18 +00:00
Robin Morisset
0acd42142a Answer to Philip Reames comments
- add check for volatile (probably unneeded, but I agree that we should be conservative about it).
- strengthen condition from isUnordered() to isSimple(), as I don't understand well enough Unordered semantics (and it also matches the comment better this way) to be confident in the previous behaviour (thanks for catching that one, I had missed the case Monotonic/Unordered).
- separate a condition in two.
- lengthen comment about aliasing and loads
- add tests in GVN/atomic.ll

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215943 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-18 22:18:14 +00:00
Robin Morisset
6c0e1e0fa6 Weak relaxing of the constraints on atomics in MemoryDependencyAnalysis
Monotonic accesses do not have to kill the analysis, as long as the QueryInstr is not
itself atomic.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215942 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-18 22:18:11 +00:00
Lang Hames
08f77a9f42 [MCJIT] Respect target endianness in RuntimeDyldMachO and RuntimeDyldChecker.
This patch may address some of the issues described in http://llvm.org/PR20640.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215938 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-18 21:43:16 +00:00
Kevin Enderby
f759032ccd Make llvm-objdump handle both arm and thumb disassembly from the same Mach-O
file with -macho, the Mach-O specific object file parser option.

After some discussion I chose to do this implementation contained in the logic
of llvm-objdump’s MachODump.cpp using a second disassembler for thumb when
needed and with updates mostly contained in the MachOObjectFile class.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215931 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-18 20:21:02 +00:00
Quentin Colombet
0526d167a9 [X86][Haswell][SchedModel] Tidy up.
<rdar://problem/15607571>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215924 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-18 17:56:01 +00:00
Quentin Colombet
48e3a273de [X86][Haswell][SchedModel] Add architecture specific scheduling models.
Group: Floating Point XMM and YMM instructions.
Sub-group: Other instructions.

<rdar://problem/15607571>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215923 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-18 17:55:59 +00:00
Quentin Colombet
7af88ec907 [X86][Haswell][SchedModel] Add architecture specific scheduling models.
Group: Floating Point XMM and YMM instructions.
Sub-group: Logic instructions.

<rdar://problem/15607571>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215922 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-18 17:55:56 +00:00
Quentin Colombet
487ecab8d4 [X86][Haswell][SchedModel] Add architecture specific scheduling models.
Group: Floating Point XMM and YMM instructions.
Sub-group: Math instructions.

<rdar://problem/15607571>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215921 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-18 17:55:53 +00:00
Quentin Colombet
3d6a30ea3b [X86][Haswell][SchedModel] Add architecture specific scheduling models.
Group: Floating Point XMM and YMM instructions.
Sub-group: Arithmetic instructions.

<rdar://problem/15607571>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215920 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-18 17:55:51 +00:00
Quentin Colombet
25529b337f [X86][Haswell][SchedModel] Add architecture specific scheduling models.
Group: Floating Point XMM and YMM instructions.
Sub-group: Conversion instructions.

<rdar://problem/15607571>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215919 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-18 17:55:49 +00:00
Quentin Colombet
540b4f6c08 [X86][Haswell][SchedModel] Add architecture specific scheduling models.
Group: Floating Point XMM and YMM instructions.
Sub-group: Move instructions.

<rdar://problem/15607571>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215918 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-18 17:55:46 +00:00
Quentin Colombet
7bdfd1b443 [X86][Haswell][SchedModel] Add architecture specific scheduling models.
Group: Integer MMX and XMM instructions.
Sub-group: Other instructions.

<rdar://problem/15607571>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215917 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-18 17:55:43 +00:00
Quentin Colombet
0c5071f561 [X86][Haswell][SchedModel] Add architecture specific scheduling models.
Group: Integer MMX and XMM instructions.
Sub-group: Logic instructions.

<rdar://problem/15607571>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215916 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-18 17:55:41 +00:00
Quentin Colombet
1cb132f921 [X86][Haswell][SchedModel] Add architecture specific scheduling models.
Group: Integer MMX and XMM instructions.
Sub-group: Arithmetic instructions.

<rdar://problem/15607571>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215915 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-18 17:55:39 +00:00
Quentin Colombet
84cab94cbb [X86][Haswell][SchedModel] Add architecture specific scheduling models.
Group: Integer MMX and XMM instructions.
Sub-group: Move instructions.

<rdar://problem/15607571>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215914 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-18 17:55:36 +00:00
Quentin Colombet
f8da7e552c [X86][Haswell][SchedModel] Add architecture specific scheduling models.
Group: Floating Point x87 instructions.
Sub-group: Math instructions.

<rdar://problem/15607571>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215913 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-18 17:55:32 +00:00
Quentin Colombet
435fa2bddf [X86][Haswell][SchedModel] Add architecture specific scheduling models.
Group: Floating Point x87 instructions.
Sub-group: Arithmetic instructions.

<rdar://problem/15607571>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215912 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-18 17:55:29 +00:00
Quentin Colombet
a49b463a19 [X86][Haswell][SchedModel] Add architecture specific scheduling models.
Group: Floating Point x87 instructions.
Sub-group: Move instructions.

<rdar://problem/15607571>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215911 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-18 17:55:26 +00:00
Quentin Colombet
d2ea3168ae [X86][Haswell][SchedModel] Add architecture specific scheduling models.
Group: Integer instructions.
Sub-group: Other instructions.

<rdar://problem/15607571>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215910 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-18 17:55:23 +00:00
Quentin Colombet
184c0f8b2f [X86][Haswell][SchedModel] Add architecture specific scheduling models.
Group: Integer instructions.
Sub-group: Synchronization instructions.

<rdar://problem/15607571>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215909 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-18 17:55:21 +00:00
Quentin Colombet
2a2fcc1a0e [X86][Haswell][SchedModel] Add architecture specific scheduling models.
Group: Integer instructions.
Sub-group: String instructions.

<rdar://problem/15607571>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215908 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-18 17:55:19 +00:00
Quentin Colombet
0cccab7515 [X86][Haswell][SchedModel] Add architecture specific scheduling models.
Group: Integer instructions.
Sub-group: Control transfer instructions.

<rdar://problem/15607571>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215907 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-18 17:55:16 +00:00
Quentin Colombet
29b31c6eaf [X86][Haswell][SchedModel] Add architecture specific scheduling models.
Group: Integer instructions.
Sub-group: Logic instructions.

<rdar://problem/15607571>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215906 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-18 17:55:13 +00:00
Quentin Colombet
3f17d37327 [X86][Haswell][SchedModel] Add architecture specific scheduling models.
Group: Integer instructions.
Sub-group: Arithmetic instructions.

<rdar://problem/15607571>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215905 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-18 17:55:11 +00:00
Quentin Colombet
94ce368a5e [X86][Haswell][SchedModel] Add architecture specific scheduling models.
Group: Integer instructions.
Sub-group: Move instructions.

<rdar://problem/15607571>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215904 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-18 17:55:08 +00:00
Robin Morisset
af2fa71a64 Make use of isAtLeastRelease/Acquire in the ARM/AArch64 backends
Summary:
Make use of isAtLeastRelease/Acquire in the ARM/AArch64 backends
These helper functions are introduced in D4844.
Depends D4844

Test Plan: make check-all passes

Reviewers: jfb

Subscribers: aemerson, llvm-commits, mcrosier, reames

Differential Revision: http://reviews.llvm.org/D4937

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215902 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-18 16:48:58 +00:00