Chris Lattner
11a3a9d27d
minor updates
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35143 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-18 22:41:33 +00:00
Nick Lewycky
7f4ba44f37
This is implemented. We now generate:
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entry:
icmp ugt i32 %x, 4 ; <i1>:0 [#uses=1]
br i1 %0, label %cond_true, label %cond_false
cond_true: ; preds = %entry
%tmp1 = tail call i32 (...)* @bar( i32 12 ) ; <i32> [#uses=0]
ret void
cond_false: ; preds = %entry
switch i32 %x, label %cond_true15 [
i32 4, label %cond_true3
i32 3, label %cond_true7
i32 2, label %cond_true11
i32 0, label %cond_false17
]
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35142 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-18 14:37:20 +00:00
Evan Cheng
cf596c54d4
- Merge UsedBlocks info after two virtual registers are coalesced.
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- Use distance to closest use to determine whether to abort coalescing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35141 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-18 09:05:55 +00:00
Evan Cheng
e951cd1647
Keep UsedBlocks info accurate.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35140 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-18 09:02:31 +00:00
Nick Lewycky
1eda0f60d7
Propagate ValueRanges across equality.
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Add some more micro-optimizations: x * 0 = 0, a - x = a --> x = 0.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35138 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-18 01:09:32 +00:00
Anton Korobeynikov
1cc6452181
Silence warning
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35137 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-17 14:48:06 +00:00
Evan Cheng
c6a2410d58
Track the BB's where each virtual register is used.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35135 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-17 09:29:54 +00:00
Evan Cheng
ba1a3df608
Joining a live interval of a physical register with a virtual one can turn out
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to be really bad. Once they are joined they are not broken apart. Also, physical
intervals cannot be spilled!
Added a heuristic as a workaround for this. Be careful coalescing with a
physical register if the virtual register uses are "far". Check if there are
uses in the same loop as the source (copy instruction). Check if it is in the
loop preheader, etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35134 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-17 09:27:35 +00:00
Evan Cheng
db264ae07f
Use SmallSet instead of std::set.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35133 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-17 08:53:30 +00:00
Evan Cheng
2edd563825
If sdisel has decided to sink GEP index expression into any BB. Replace all uses
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in that BB.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35132 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-17 08:22:49 +00:00
Devang Patel
84f7fd2483
Support 'I' inline asm constraint.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35129 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-17 00:13:28 +00:00
Lauro Ramos Venancio
368f20fda4
Only ARMv6 has BSWAP.
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Fix MultiSource/Applications/aha test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35128 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-16 22:54:16 +00:00
Evan Cheng
9e2d86add8
Turn on GEP index sinking by default.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35127 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-16 18:32:30 +00:00
Evan Cheng
9f5ead9601
Stupid bug.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35126 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-16 17:50:20 +00:00
Bill Wendling
1b7a81d3ae
And now support for MMX logical operations.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35125 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-16 09:44:46 +00:00
Evan Cheng
3cd4e5095b
Sink a binary expression into its use blocks if it is a loop invariant
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computation used as GEP indexes and if the expression can be folded into
target addressing mode of GEP load / store use types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35123 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-16 08:46:27 +00:00
Evan Cheng
2770747216
Added isLegalAddressExpression(). Only allows X +/- C for now.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35122 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-16 08:43:56 +00:00
Evan Cheng
14245a9d62
Added isLegalAddressExpression hook to test if the given expression can be
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folded into target addressing mode for the given type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35121 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-16 08:42:32 +00:00
Nick Lewycky
4c70875774
Add more comments and update to new asm syntax.
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Add new micro-optimizations.
Add icmp predicate snuggling. Given %x ULT 4, "icmp ugt %x, 2" becomes
"icmp eq %x, 3". This doesn't apply in any non-trivial cases yet due to missing
support for NE values in ValueRanges.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35119 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-16 02:37:39 +00:00
Bill Wendling
74027e98f1
Multiplication support for MMX.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35118 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-15 21:24:36 +00:00
Evan Cheng
56fdd7af88
Debugging output stuff.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35117 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-15 21:19:28 +00:00
Evan Cheng
c6deb3d447
Estimate a cost using the possible number of scratch registers required and use
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it as a late BURR scheduling tie-breaker.
Intuitively, it's good to push down instructions whose results are liveout so
their long live ranges won't conflict with other values which are needed inside
the BB. Further prioritize liveout instructions by the number of operands which
are calculated within the BB.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35109 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-14 22:43:40 +00:00
Evan Cheng
ba693005e9
Under X86-64 large code model, do not emit 32-bit pc relative calls.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35108 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-14 22:11:11 +00:00
Evan Cheng
4485d3897b
Notes about codegen issues.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35107 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-14 21:03:53 +00:00
Evan Cheng
e70ef98043
Clean up.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35105 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-14 20:20:19 +00:00
Evan Cheng
774be29769
Oops.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35104 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-14 19:44:58 +00:00
Evan Cheng
a19ac52863
X86-64 JIT is in large code model. Need stubs for direct calls.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35097 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-14 10:51:55 +00:00
Evan Cheng
8510dc086e
x86-64 JIT stub codegen.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35096 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-14 10:48:08 +00:00
Evan Cheng
5c0b61a64b
Preliminary support for X86-64 JIT stub codegen.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35095 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-14 10:44:30 +00:00
Zhou Sheng
adc149549d
ShiftAmt might equal to zero. Handle this situation.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35094 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-14 09:07:33 +00:00
Zhou Sheng
9670445cd4
Enable KnownZero/One.clear().
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35093 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-14 03:21:24 +00:00
Evan Cheng
61230d18d2
Try schedule def + use closer whne Sethi-Ullman numbers are the same.
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e.g.
t1 = op t2, c1
t3 = op t4, c2
and the following instructions are both ready.
t2 = op c3
t4 = op c4
Then schedule t2 = op first.
i.e.
t4 = op c4
t2 = op c3
t1 = op t2, c1
t3 = op t4, c2
This creates more short live intervals which work better with the register
allocator.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35089 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-13 23:25:11 +00:00
Evan Cheng
a13fd108f2
AM2 can match 2^n +/- 1. e.g. ldr r3, [r2, r2, lsl #2 ]
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35088 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-13 21:05:54 +00:00
Evan Cheng
961f879ed8
Zero is always a legal AM immediate.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35087 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-13 20:37:59 +00:00
Evan Cheng
1d95816db5
Correct type info for isLegalAddressImmediate() check.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35086 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-13 20:34:37 +00:00
Nicolas Geoffray
b2ec1cc6cb
Stack and register alignment of call arguments in the ELF ABI
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35083 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-13 15:02:46 +00:00
Chris Lattner
bc1dbfce62
ifdef out some dead code.
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Fix PR1244 and Transforms/InstCombine/2007-03-13-CompareMerge.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35082 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-13 14:27:42 +00:00
Zhou Sheng
b277b16593
For expression like
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"APInt::getAllOnesValue(ShiftAmt).zextOrCopy(BitWidth)",
to handle ShiftAmt == BitWidth situation, use zextOrCopy() instead of
zext().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35080 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-13 06:40:59 +00:00
Zhou Sheng
771dbf7677
In APInt version ComputeMaskedBits():
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1. Ensure VTy, KnownOne and KnownZero have same bitwidth.
2. Make code more efficient.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35078 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-13 02:23:10 +00:00
Evan Cheng
e8308df0b9
Implement getTargetLowering() or else LSR won't be using ARM specific hooks.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35077 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-13 01:20:42 +00:00
Evan Cheng
c289faf015
More flexible TargetLowering LSR hooks for testing whether an immediate is a legal target address immediate or scale.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35076 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-12 23:37:10 +00:00
Evan Cheng
b01fad6d19
Updated TargetLowering LSR addressing mode hooks for ARM and Thumb.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35075 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-12 23:30:29 +00:00
Evan Cheng
861939152d
More flexible TargetLowering LSR hooks for testing whether an immediate is a legal target address immediate or scale.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35074 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-12 23:29:01 +00:00
Evan Cheng
a8a155e77f
More flexible TargetLowering LSR hooks for testing whether an immediate is
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a legal target address immediate or scale.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35073 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-12 23:28:50 +00:00
Evan Cheng
5eef2d21a0
Use new TargetLowering addressing modes hooks.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35072 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-12 23:27:37 +00:00
Evan Cheng
37e8856f74
Stupid bug: SSE2 supports v2i64 add / sub.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35070 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-12 22:58:52 +00:00
Reid Spencer
4fd8606791
Revert the last patch as it violates the conditions of sext/zext.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35068 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-12 18:37:25 +00:00
Jeff Cohen
2b7d7b57ae
Unbreak C++ build.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35067 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-12 17:57:00 +00:00
Jeff Cohen
c4558fde76
Unbreak VC++ build. Do not use identifiers starting with _ as they are reserved and
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can collide with system defined names. Windows defines _BB, for example.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35066 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-12 17:56:27 +00:00
Zhou Sheng
7d820f57e2
For APInt::z/sext(width), if width == BitWidth, just return *this.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35065 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-12 17:47:45 +00:00