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Author SHA1 Message Date
Andrew Trick
24312230ad Fix a few cases where the scheduler is not checking for phys reg copies. The scheduling node may have a NULL DAG node, yuck. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122544 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-24 06:46:50 +00:00
Jim Grosbach
398abb4a9a Trailing whitespace. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122542 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-24 05:06:32 +00:00
Andrew Trick
2da8bc8a5f Various bits of framework needed for precise machine-level selection 
DAG scheduling during isel. Most new functionality is currently
guarded by -enable-sched-cycles and -enable-sched-hazard.

Added InstrItineraryData::IssueWidth field, currently derived from
ARM itineraries, but could be initialized differently on other targets.

Added ScheduleHazardRecognizer::MaxLookAhead to indicate whether it is
active, and if so how many cycles of state it holds.

Added SchedulingPriorityQueue::HasReadyFilter to allowing gating entry
into the scheduler's available queue.

ScoreboardHazardRecognizer now accesses the ScheduleDAG in order to
get information about it's SUnits, provides RecedeCycle for bottom-up
scheduling, correctly computes scoreboard depth, tracks IssueCount, and
considers potential stall cycles when checking for hazards.

ScheduleDAGRRList now models machine cycles and hazards (under
flags). It tracks MinAvailableCycle, drives the hazard recognizer and
priority queue's ready filter, manages a new PendingQueue, properly
accounts for stall cycles, etc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122541 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-24 05:03:26 +00:00
Andrew Trick
6e8f4c4048 whitespace 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122539 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-24 04:28:06 +00:00
Cameron Zwarich
ef485d8658 Simplify a check for implicit defs and remove a FIXME. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122537 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-24 03:09:36 +00:00
Kevin Enderby
d82ed5b734 In llvm-mc parse a Hash token as a full line comment. Allows handling of 
preprocessed .s files and matches darwin gas.  rdar://8798690
Also fix a comment on the next line of AsmParser.cpp after this new code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122531 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-24 00:12:02 +00:00
Jim Grosbach
f12eee75d1 Use a StringSwitch<> instead of a manually constructed string matcher. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122530 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-24 00:03:39 +00:00
Owen Anderson
ec3953ff95 When determining if we can fold (x >> C1) << C2, the bits that we need to verify are zero 
are not the low bits of x, but the bits that WILL be the low bits after the operation completes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122529 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-23 23:56:24 +00:00
Evan Cheng
e4a2dd2f1a Code clean up. No functionality change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122528 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-23 23:54:17 +00:00
Jim Grosbach
b0ad9cf935 Remove dead patterns. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122524 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-23 23:20:13 +00:00
Jim Grosbach
940c8e5494 Recognize a few more documented register name aliases for ARM in the asm lexer. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122523 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-23 23:19:54 +00:00
Bob Wilson
3c904694fc Radar 8803471: Fix expansion of ARM BCCi64 pseudo instructions. 
If the basic block containing the BCCi64 (or BCCZi64) instruction ends with
an unconditional branch, that branch needs to be deleted before appending
the expansion of the BCCi64 to the end of the block.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122521 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-23 22:45:49 +00:00
Oscar Fuentes
af62935bce Do not re-test for the existence of pthread.h. 
It was causing problems on the MinGW build. See PR8849.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122518 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-23 21:27:22 +00:00
Torok Edwin
78982611d8 XFAIL vg_leak the new test as the rest. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122517 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-23 21:22:09 +00:00
Owen Anderson
d5f8684b16 It is possible for SimplifyCFG to cause PHI nodes to become redundant too late in the optimization 
pipeline to be caught by instcombine, and it's not feasible to catch them in SimplifyCFG because the
use-lists are in an inconsistent state at the point where it could know that it need to simplify them.
Instead, have CodeGenPrepare look for trivially redundant PHIs as part of its general cleanup effort.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122516 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-23 20:57:35 +00:00
Chris Lattner
036609bd7d Flag -> Glue, the ongoing saga 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122513 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-23 18:28:41 +00:00
Chris Lattner
29d8f0cae4 flags -> glue for selectiondag 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122509 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-23 17:24:32 +00:00
Chris Lattner
a4359be032 sdisel flag -> glue. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122507 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-23 17:13:18 +00:00
Chris Lattner
8950bcaa5a continue renaming flag -> glue. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122506 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-23 17:03:20 +00:00
Torok Edwin
a156efdf71 Fix OCaml bindings crash, PR8847. 
See http://caml.inria.fr/mantis/view.php?id=4166
If we call only external functions from a module, then its 'let _' bindings
don't get executed, which means that the exceptions don't get registered for use
in the C code.
This in turn causes llvm_raise to call raise_with_arg() with a NULL pointer and
cause a segmentation fault.

The workaround is to declare all 'external' functions as 'val' in these .mli
files.

Also added a separate testcase (the testcase must call only external functions
for the bug to occur).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122497 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-23 15:49:26 +00:00
Benjamin Kramer
9d071cbb92 Remove/fix invalid README entries. The well thought out strcpy function doesn't return a pointer to the end of the string. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122496 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-23 15:32:07 +00:00
Benjamin Kramer
3e4106105b Remove some obsolete README items, add a new one off the top of my head. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122495 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-23 15:07:02 +00:00
Andrew Trick
2902736a50 Reorganize ListScheduleBottomUp in preparation for modeling machine cycles and instruction issue. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122491 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-23 05:42:20 +00:00
Andrew Trick
3d420cb2fe Converted LiveRegCycles to LiveRegGens. It's easier to work with and allows multiple nodes per cycle. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122474 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-23 04:16:14 +00:00
Andrew Trick
cb7947b81b In CheckForLiveRegDef use TRI->getOverlaps. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122473 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-23 03:43:21 +00:00
Andrew Trick
1b1658741a Fixes PR8823: add-with-overflow-128.ll 
In the bottom-up selection DAG scheduling, handle two-address
instructions that read/write unspillable registers. Treat
the entire chain of two-address nodes as a single live range.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122472 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-23 03:15:51 +00:00
Mon P Wang
e90a6333c3 Preserve the address space when generating bitcasts for MemTransferInst in ConvertToScalarInfo 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122462 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-23 01:41:32 +00:00
Jeffrey Yasskin
8e68c38735 Change all self assignments X=X to (void)X, so that we can turn on a 
new gcc warning that complains on self-assignments and
self-initializations.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122458 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-23 00:58:24 +00:00
Bill Wendling
65e43a259f Default to armv7 instead of armv6. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122457 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-23 00:49:18 +00:00
Jim Grosbach
9584bd83e6 Trailing whitespace. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122456 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-22 23:26:02 +00:00
Benjamin Kramer
f50125ecaa DAGCombine add (sext i1), X into sub X, (zext i1) if sext from i1 is illegal. The latter usually compiles into smaller code. 
example code:
unsigned foo(unsigned x, unsigned y) {
  if (x != 0) y--;
  return y;
}

before:
  _foo:                           ## @foo
    cmpl  $1, 4(%esp)             ## encoding: [0x83,0x7c,0x24,0x04,0x01]
    sbbl  %eax, %eax              ## encoding: [0x19,0xc0]
    notl  %eax                    ## encoding: [0xf7,0xd0]
    addl  8(%esp), %eax           ## encoding: [0x03,0x44,0x24,0x08]
    ret                           ## encoding: [0xc3]

after:
  _foo:                           ## @foo
    cmpl  $1, 4(%esp)             ## encoding: [0x83,0x7c,0x24,0x04,0x01]
    movl  8(%esp), %eax           ## encoding: [0x8b,0x44,0x24,0x08]
    adcl  $-1, %eax               ## encoding: [0x83,0xd0,0xff]
    ret                           ## encoding: [0xc3]



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122455 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-22 23:17:45 +00:00
Benjamin Kramer
4ac19470dc InstCombine: creating selects from -1 and 0 is fine, they combine into a sext from i1. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122453 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-22 23:12:15 +00:00
Benjamin Kramer
e915ff30cd X86: Lower a select directly to a setcc_carry if possible. 
int test(unsigned long a, unsigned long b) { return -(a < b); }
compiles to
  _test:                              ## @test
    cmpq  %rsi, %rdi                  ## encoding: [0x48,0x39,0xf7]
    sbbl  %eax, %eax                  ## encoding: [0x19,0xc0]
    ret                               ## encoding: [0xc3]
instead of
  _test:                              ## @test
    xorl  %ecx, %ecx                  ## encoding: [0x31,0xc9]
    cmpq  %rsi, %rdi                  ## encoding: [0x48,0x39,0xf7]
    movl  $-1, %eax                   ## encoding: [0xb8,0xff,0xff,0xff,0xff]
    cmovael %ecx, %eax                ## encoding: [0x0f,0x43,0xc1]
    ret                               ## encoding: [0xc3]


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122451 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-22 23:09:28 +00:00
Rafael Espindola
10b6d33581 Add r122359 back now that the bug in MCDwarfLineAddrFragment fragment has been 
fixed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122448 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-22 22:16:24 +00:00
Dan Gohman
df3ee64d79 Constify. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122447 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-22 22:10:08 +00:00
Rafael Espindola
835439a397 Assert that the AddrDelta expression is really constant and wrap it in a set 
if we have a lame assembler.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122446 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-22 22:04:28 +00:00
Jakob Stoklund Olesen
770d42de3b When RegAllocGreedy decides to spill the interferences of the current register, 
pick the victim with the lowest total spill weight.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122445 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-22 22:01:30 +00:00
Jakob Stoklund Olesen
c64379da07 Include a shadow of the original CFG edges in the edge bundle graph. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122444 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-22 22:01:28 +00:00
Rafael Espindola
90a5a0cd7c Rename NeedsSetToChangeDiffSize to HasAggressiveSymbolFolding which is a much 
better name and matches what is used in the MachO writer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122443 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-22 21:51:29 +00:00
Daniel Dunbar
72123334ad MC/Mach-O/ARM: Don't try to use scattered relocs for BR24 fixups. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122441 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-22 21:26:43 +00:00
Rafael Espindola
ecbbf40d5c Add reduced test from 8845. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122438 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-22 21:15:13 +00:00
Rafael Espindola
bf57b838b8 Revert r122359 while I debug PR8845. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122427 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-22 19:05:49 +00:00
Matt Beaumont-Gay
33a03c73ef Fix another conditional expression mismatched enum type warning. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122419 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-22 18:25:55 +00:00
Duncan Sands
1cd05bb605 When determining whether the new instruction was already present in 
the original instruction, half the cases were missed (making it not
wrong but suboptimal).  Also correct a typo (A <-> B) in the second
chunk. 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122414 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-22 17:15:25 +00:00
Duncan Sands
b3898af89f Make this test not depend on how the variable is named. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122413 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-22 17:08:04 +00:00
Daniel Dunbar
df561e0234 MC/Mach-O/ARM: We always use the SECTDIFF reloc type on ARM, which is 
esp. important given that the LOCAL_SECTDIFF enumeration got redefined.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122412 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-22 16:52:19 +00:00
Daniel Dunbar
25bcc9cdc8 MC/Mach-O/ARM: Clone off an ARM version of RecordScatteredRelocation until I figure out how it is supposed to work. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122410 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-22 16:45:29 +00:00
Daniel Dunbar
5cc6390495 MC/Mach-O: Return to reporting errors if we see unexpected fixup kinds. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122409 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-22 16:32:41 +00:00
Daniel Dunbar
3664564395 MC/Mach-O/ARM: Recognize generic _Data_N fixup kinds. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122408 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-22 16:32:37 +00:00
Daniel Dunbar
294e67861c MC/Mach-O/ARM: Add enough relocation logic to get BR24 relocations. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122407 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-22 16:19:24 +00:00