Commit Graph

15 Commits

Author SHA1 Message Date
Andrew Trick
13745262a8 Added instregex support to TableGen subtarget emitter.
This allows the processor-specific machine model to override selected
base opcodes without any fanciness.
e.g. InstRW<[CoreXWriteVANDP], (instregex "VANDP")>.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165180 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-03 23:06:32 +00:00
Owen Anderson
6b31d4ea36 Teach tblgen's set theory "sequence" operator to support an optional stride operand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157416 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-24 21:37:08 +00:00
Jakob Stoklund Olesen
5b52f6d655 Add an (interleave A, B, ...) SetTheory operator.
This will interleave the elements from two or more lists.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148824 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-24 18:06:05 +00:00
David Blaikie
2d24e2a396 Unweaken vtables as per http://llvm.org/docs/CodingStandards.html#ll_virtual_anch
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146960 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-20 02:50:00 +00:00
Peter Collingbourne
7c78888887 Move TableGen's parser and entry point into a library
This is the first step towards splitting LLVM and Clang's tblgen executables.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140951 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-01 16:41:13 +00:00
David Greene
05bce0beee Unconstify Inits
Remove const qualifiers from Init references, per Chris' request.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136531 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-29 22:43:06 +00:00
David Greene
f37dd02f77 [AVX] Constify Inits
Make references to Inits const everywhere.  This is the final step
before making them unique.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136485 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-29 19:07:05 +00:00
Eric Christopher
d568b3f552 Revert r134921, 134917, 134908 and 134907. They're causing failures
in multiple buildbots.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134936 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-11 23:06:52 +00:00
David Greene
d4a9066c93 [AVX] Make Inits Foldable
Manage Inits in a FoldingSet.  This provides several benefits:

- Memory for Inits is properly managed

- Duplicate Inits are folded into Flyweights, saving memory

- It enforces const-correctness, protecting against certain classes
  of bugs

The above benefits allow Inits to be used in more contexts, which in
turn provides more dynamism to TableGen.  This enhanced capability
will be used by the AVX code generator to a fold common patterns
together.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134907 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-11 18:25:51 +00:00
Jim Grosbach
0b6a44afb9 Consolidate some TableGen diagnostic helper functions.
TableGen had diagnostic printers sprinkled about in a few places. Pull them
together into a single location in Error.cpp.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133568 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-21 22:55:50 +00:00
Jakob Stoklund Olesen
2559011a01 Prempt some obnoxious compiler from complaing about signed/unsigned
compares.

2^30 is actually the limit on the number of physical registers per
TargetRegisterInfo.h.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133142 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16 03:07:40 +00:00
Jakob Stoklund Olesen
0cc0929efc Make sure to pass an unsigned to a printf format that is always %u.
This should unbreak the native ARM testers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133141 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16 02:55:56 +00:00
Jakob Stoklund Olesen
c017bc1c1e Drop a RecordKeeper reference that wasn't necessary.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132636 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-04 07:49:55 +00:00
Jakob Stoklund Olesen
1023f5a42d Silence compiler warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132624 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-04 05:09:36 +00:00
Jakob Stoklund Olesen
1de99829b6 Teach TableGen to evaluate DAG expressions as set operations.
A TableGen backend can define how certain classes can be expanded into
ordered sets of defs, typically by evaluating a specific field in the
record. The SetTheory class can then evaluate DAG expressions that refer
to these named sets.

A number of standard set and list operations are predefined, and the
backend can add more specialized operators if needed. The -print-sets
backend is used by SetTheory.td to provide examples.

This is intended to simplify how register classes are defined:

  def GR32_NOSP : RegisterClass<"X86", [i32], 32, (sub GR32, ESP)>;

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132621 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-04 04:11:37 +00:00