Commit Graph

1716 Commits

Author SHA1 Message Date
Kevin Enderby
14ccc9007a Added a option to the disassembler to print immediates as hex.
This is for the lldb team so most of but not all of the values are
to be printed as hex with this option.  Some small values like the
scale in an X86 address were requested to printed in decimal
without the leading 0x.

There may be some tweaks need to places that may still be in
decimal that they want in hex.  Specially for arm.  I made my best
guess.  Any tweaks from here should be simple.

I also did the best I know now with help from the C++ gurus
creating the cleanest formatImm() utility function and containing
the changes.  But if someone has a better idea to make something
cleaner I'm all ears and game for changing the implementation.

rdar://8109283



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169393 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-05 18:13:19 +00:00
Bill Schmidt
d7802bf0dd This patch introduces initial-exec model support for thread-local storage
on 64-bit PowerPC ELF.

The patch includes code to handle external assembly and MC output with the
integrated assembler.  It intentionally does not support the "old" JIT.

For the initial-exec TLS model, the ABI requires the following to calculate
the address of external thread-local variable x:

 Code sequence            Relocation                  Symbol
  ld 9,x@got@tprel(2)      R_PPC64_GOT_TPREL16_DS      x
  add 9,9,x@tls            R_PPC64_TLS                 x

The register 9 is arbitrary here.  The linker will replace x@got@tprel
with the offset relative to the thread pointer to the generated GOT
entry for symbol x.  It will replace x@tls with the thread-pointer
register (13).

The two test cases verify correct assembly output and relocation output
as just described.

PowerPC-specific selection node variants are added for the two
instructions above:  LD_GOT_TPREL and ADD_TLS.  These are inserted
when an initial-exec global variable is encountered by
PPCTargetLowering::LowerGlobalTLSAddress(), and later lowered to
machine instructions LDgotTPREL and ADD8TLS.  LDgotTPREL is a pseudo
that uses the same LDrs support added for medium code model's LDtocL,
with a different relocation type.

The rest of the processing is straightforward.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169281 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-04 16:18:08 +00:00
Chandler Carruth
a1514e24cc Sort includes for all of the .h files under the 'lib' tree. These were
missed in the first pass because the script didn't yet handle include
guards.

Note that the script is now able to handle all of these headers without
manual edits. =]

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169224 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-04 07:12:27 +00:00
Chandler Carruth
d04a8d4b33 Use the new script to sort the includes of every file under lib.
Sooooo many of these had incorrect or strange main module includes.
I have manually inspected all of these, and fixed the main module
include to be the nearest plausible thing I could find. If you own or
care about any of these source files, I encourage you to take some time
and check that these edits were sensible. I can't have broken anything
(I strictly added headers, and reordered them, never removed), but they
may not be the headers you'd really like to identify as containing the
API being implemented.

Many forward declarations and missing includes were added to a header
files to allow them to parse cleanly when included first. The main
module rule does in fact have its merits. =]

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169131 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-03 16:50:05 +00:00
Daniel Dunbar
4259a1a7d8 MC/AsmParser: Avoid unnecessary use of SourceMgr::FindBufferForLoc()
- Each macro instantiation introduces a new buffer, and FindBufferForLoc() is
   linear, so previously macro instantiation could be N^2 for some pathological
   inputs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169073 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-01 01:38:48 +00:00
Eric Christopher
67587f462e Add the rest of the experimental fission sections to MC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168986 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-30 06:47:06 +00:00
Eric Christopher
6acb53152c Add brief support for the fission .debug_info.dwo section for
ELF output.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168764 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-28 02:49:38 +00:00
Eric Christopher
ea1504d0bd Add comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168763 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-28 02:49:34 +00:00
Bill Schmidt
34a9d4b3b9 This patch implements medium code model support for 64-bit PowerPC.
The default for 64-bit PowerPC is small code model, in which TOC entries
must be addressable using a 16-bit offset from the TOC pointer.  Additionally,
only TOC entries are addressed via the TOC pointer.

With medium code model, TOC entries and data sections can all be addressed
via the TOC pointer using a 32-bit offset.  Cooperation with the linker
allows 16-bit offsets to be used when these are sufficient, reducing the
number of extra instructions that need to be executed.  Medium code model
also does not generate explicit TOC entries in ".section toc" for variables
that are wholly internal to the compilation unit.

Consider a load of an external 4-byte integer.  With small code model, the
compiler generates:

	ld 3, .LC1@toc(2)
	lwz 4, 0(3)

	.section	.toc,"aw",@progbits
.LC1:
	.tc ei[TC],ei

With medium model, it instead generates:

	addis 3, 2, .LC1@toc@ha
	ld 3, .LC1@toc@l(3)
	lwz 4, 0(3)

	.section	.toc,"aw",@progbits
.LC1:
	.tc ei[TC],ei

Here .LC1@toc@ha is a relocation requesting the upper 16 bits of the
32-bit offset of ei's TOC entry from the TOC base pointer.  Similarly,
.LC1@toc@l is a relocation requesting the lower 16 bits.  Note that if
the linker determines that ei's TOC entry is within a 16-bit offset of
the TOC base pointer, it will replace the "addis" with a "nop", and
replace the "ld" with the identical "ld" instruction from the small
code model example.

Consider next a load of a function-scope static integer.  For small code
model, the compiler generates:

	ld 3, .LC1@toc(2)
	lwz 4, 0(3)

	.section	.toc,"aw",@progbits
.LC1:
	.tc test_fn_static.si[TC],test_fn_static.si
	.type	test_fn_static.si,@object
	.local	test_fn_static.si
	.comm	test_fn_static.si,4,4

For medium code model, the compiler generates:

	addis 3, 2, test_fn_static.si@toc@ha
	addi 3, 3, test_fn_static.si@toc@l
	lwz 4, 0(3)

	.type	test_fn_static.si,@object
	.local	test_fn_static.si
	.comm	test_fn_static.si,4,4

Again, the linker may replace the "addis" with a "nop", calculating only
a 16-bit offset when this is sufficient.

Note that it would be more efficient for the compiler to generate:

	addis 3, 2, test_fn_static.si@toc@ha
        lwz 4, test_fn_static.si@toc@l(3)

The current patch does not perform this optimization yet.  This will be
addressed as a peephole optimization in a later patch.

For the moment, the default code model for 64-bit PowerPC will remain the
small code model.  We plan to eventually change the default to medium code
model, which matches current upstream GCC behavior.  Note that the different
code models are ABI-compatible, so code compiled with different models will
be linked and execute correctly.

I've tested the regression suite and the application/benchmark test suite in
two ways:  Once with the patch as submitted here, and once with additional
logic to force medium code model as the default.  The tests all compile
cleanly, with one exception.  The mandel-2 application test fails due to an
unrelated ABI compatibility with passing complex numbers.  It just so happens
that small code model was incredibly lucky, in that temporary values in 
floating-point registers held the expected values needed by the external
library routine that was called incorrectly.  My current thought is to correct
the ABI problems with _Complex before making medium code model the default,
to avoid introducing this "regression."

Here are a few comments on how the patch works, since the selection code
can be difficult to follow:

The existing logic for small code model defines three pseudo-instructions:
LDtoc for most uses, LDtocJTI for jump table addresses, and LDtocCPT for
constant pool addresses.  These are expanded by SelectCodeCommon().  The
pseudo-instruction approach doesn't work for medium code model, because
we need to generate two instructions when we match the same pattern.
Instead, new logic in PPCDAGToDAGISel::Select() intercepts the TOC_ENTRY
node for medium code model, and generates an ADDIStocHA followed by either
a LDtocL or an ADDItocL.  These new node types correspond naturally to
the sequences described above.

The addis/ld sequence is generated for the following cases:
 * Jump table addresses
 * Function addresses
 * External global variables
 * Tentative definitions of global variables (common linkage)

The addis/addi sequence is generated for the following cases:
 * Constant pool entries
 * File-scope static global variables
 * Function-scope static variables

Expanding to the two-instruction sequences at select time exposes the
instructions to subsequent optimization, particularly scheduling.

The rest of the processing occurs at assembly time, in
PPCAsmPrinter::EmitInstruction.  Each of the instructions is converted to
a "real" PowerPC instruction.  When a TOC entry needs to be created, this
is done here in the same manner as for the existing LDtoc, LDtocJTI, and
LDtocCPT pseudo-instructions (I factored out a new routine to handle this).

I had originally thought that if a TOC entry was needed for LDtocL or
ADDItocL, it would already have been generated for the previous ADDIStocHA.
However, at higher optimization levels, the ADDIStocHA may appear in a 
different block, which may be assembled textually following the block
containing the LDtocL or ADDItocL.  So it is necessary to include the
possibility of creating a new TOC entry for those two instructions.

Note that for LDtocL, we generate a new form of LD called LDrs.  This
allows specifying the @toc@l relocation for the offset field of the LD
instruction (i.e., the offset is replaced by a SymbolLo relocation).
When the peephole optimization described above is added, we will need
to do similar things for all immediate-form load and store operations.

The seven "mcm-n.ll" test cases are kept separate because otherwise the
intermingling of various TOC entries and so forth makes the tests fragile
and hard to understand.

The above assumes use of an external assembler.  For use of the
integrated assembler, new relocations are added and used by
PPCELFObjectWriter.  Testing is done with "mcm-obj.ll", which tests for
proper generation of the various relocations for the same sequences
tested with the external assembler.






git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168708 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-27 17:35:46 +00:00
Rafael Espindola
f4f14f68f6 Add support for .cfi_register now that it is easy to extent the representation
to support it. Original patch with the parsing and plumbing by the PaX team and
Roman Divacky. I added the bits in MCDwarf.cpp and the test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168565 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-25 15:14:49 +00:00
Benjamin Kramer
8a2ce5d329 libLTO: Add a utility method to initialize the disassemblers.
Necessary to give disassembler users (like darwin's otool) a possibility to
dlopen libLTO and still initialize the required LLVM bits. This used to go
through libMCDisassembler but that's a gross layering violation, the MC layer
can't pull in functions from the targets. Adding a function to libLTO is a bit
of a hack but not worse than exposing other disassembler bits from libLTO.

Fixes PR14362.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168545 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-24 16:59:10 +00:00
Rafael Espindola
ff233c9e5c Change the representation of MCCFIInstruction.
We now store the Register and Offset directly. MachineLocation is gone (from
this file)!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168536 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-24 04:33:48 +00:00
Rafael Espindola
7f74d2c2c1 Give each MCCFIInstruction its own opcode.
This untangles the switch cases of the old Move and RelMove opcodes a bit
and makes it clear how to add new instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168534 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-24 03:10:54 +00:00
Rafael Espindola
529a01df02 Move a bit of duplicated code into a helper function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168533 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-24 02:18:49 +00:00
Rafael Espindola
28c9ea3c13 Refactor how MCCFIInstructions are created.
Give MCCFIInstruction a single, private constructor and add helper static
methods that create each type of cfi instruction. This is is preparation
for changing its representation. The representation with a pair
MachineLocations older than MC and has been abused quiet a bit to support
more cfi instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168532 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-24 02:01:08 +00:00
Rafael Espindola
c8fec7e21f Implement .cfi_undefined. Based on a patch from PaX team, updated by
Roman Divacky. I just added the testcase.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168520 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-23 16:59:41 +00:00
Akira Hatanaka
e390434251 Add relocations used for mips big GOT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168448 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-21 19:50:22 +00:00
Alexey Samsonov
15ab115df5 Emit relocations from .debug_aranges to .debug_info for asm files
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167926 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-14 09:55:38 +00:00
Anton Korobeynikov
12cfa11960 Add ARM TARGET2 relocation. The testcase will follow with actualy use-case.
Based on the patch by Logan Chien!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167633 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-09 20:20:12 +00:00
Kevin Enderby
32c1a82a6b Fix for PR14264 cause by commit r167237 which did not take into account a
possible buffer change with a .macro directive.

rdar://12637628


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167408 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-05 21:55:41 +00:00
Kevin Enderby
938482f522 Add support for generating dwarf debugging info with assembly files
run through the 'C' preprocessor.  That is pick up the file name
and line numbers from the cpp hash file line comments for the
dwarf file and line numbers tables.

rdar://9275556



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167237 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-01 17:31:35 +00:00
Chad Rosier
efcb3d9c1c [ms-inline asm] Add support for the TYPE operator.
Part of rdar://12576868


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166790 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-26 18:04:20 +00:00
Chad Rosier
6e43157b5d [ms-inline asm] Have the target AsmParser create the asmrewrite for the offsetof
operator.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166779 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-26 16:09:20 +00:00
Chad Rosier
6a020a7117 [ms-inline asm] Add support for creating AsmRewrites in the target specific
AsmParser logic.  To be used/tested in a subsequent commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166714 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-25 20:41:34 +00:00
Adhemerval Zanella
aa71428378 Initial TOC support for PowerPC64 object creation
This patch adds initial PPC64 TOC MC object creation using the small mcmodel
(a single 64K TOC) adding the some TOC relocations (R_PPC64_TOC,
R_PPC64_TOC16, and R_PPC64_TOC16DS).

The addition of 'undefinedExplicitRelSym' hook on 'MCELFObjectTargetWriter'
is meant to avoid the creation of an unreferenced ".TOC." symbol (used in
the .odp creation) as well to set the R_PPC64_TOC relocation target as the
temporary ".TOC." symbol. On PPC64 ABI, the R_PPC64_TOC relocation should
not point to any symbol.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166677 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-25 12:27:42 +00:00
Chad Rosier
c0a14b86f7 [ms-inline asm] Create a register operand, rather than a memory operand when we
see the offsetof operator.  Previously, we were matching something like MOVrm
in the front-end and later matching MOVrr in the back-end.  This change makes
things more consistent.  It also fixes cases where we can't match against a 
memory operand as the source (test cases coming).
Part of rdar://12470317



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166592 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-24 17:22:29 +00:00
Kevin Enderby
e1d4a88134 Make branch heavy code for generating marked up disassembly simpler
and easier to read by adding a couple helper functions.  Suggestion by
Chandler Carruth and seconded by Meador Inge!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166515 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-23 22:52:52 +00:00
Chad Rosier
5a719fcb5e [ms-inline asm] Add an implementation of the offset operator. This is a follow
on patch to r166433.
rdar://12470317

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166488 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-23 17:43:43 +00:00
Eli Friedman
2128aaebd8 [ms-inline-asm] Implement _emit directive (which is roughly equivalent to .byte).
<rdar://problem/12470345>.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166451 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-22 23:58:19 +00:00
Kevin Enderby
3ed0316f75 Add support for annotated disassembly output for X86 and arm.
Per the October 12, 2012 Proposal for annotated disassembly output sent out by
Jim Grosbach this set of changes implements this for X86 and arm.  The llvm-mc
tool now has a -mdis option to produced the marked up disassembly and a couple
of small example test cases have been added.

rdar://11764962


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166445 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-22 22:31:46 +00:00
Eli Friedman
8ee16c7b66 [ms-inline asm] Don't rewrite out parts of an inline-asm skipped by .if 0 and friends.
It's unnecessary and makes the generated assembly less faithful to the original source.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166440 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-22 20:50:25 +00:00
Benjamin Kramer
63a4c24616 Symbol hygiene: Make sure declarations and definitions match, make helper functions static.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166376 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-20 12:53:26 +00:00
Chad Rosier
4e472d2277 [ms-inline asm] Rename AsmOpRewrite to just AsmRewrite to be more generic. No functional change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166360 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-20 01:02:45 +00:00
Chad Rosier
17feeec8d8 [ms-inline asm] If the state of the parser is ignore, then don't parse the
inline assembly.  Also make sure the remove the ignored statements from the IR.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166357 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-20 00:47:08 +00:00
Chad Rosier
13090f70fc [ms-inline asm] Continue parsing even when we're in an ignore block.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166352 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-19 23:15:00 +00:00
Chad Rosier
ab450e42f1 [ms-inline asm] Reset the opcode prior to parsing a statement.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166349 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-19 22:57:33 +00:00
Chad Rosier
96d58e64cf [ms-inline asm] Have the TargetParser callback to Sema to determine the size of
a memory operand.  Retain this information and then add the sizing directives
to the IR.  This allows the backend to do proper instruction selection.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166316 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-19 20:57:14 +00:00
Chad Rosier
9abfbdfc77 [ms-inline asm] Add the isParsingInlineAsm() function to the MCAsmTargetParser.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166292 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-19 17:57:49 +00:00
Nick Lewycky
0d7d11d57f Pacify -Wnon-virtual-dtor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166270 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-19 07:00:09 +00:00
Chad Rosier
3298959540 [ms-inline asm] Add a size argument to the LookupInlineAsmIdentifier() callback,
which will be used by the asm matcher in the near future.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166222 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-18 20:27:15 +00:00
Chad Rosier
c8dd27e583 [ms-inline asm] Have the LookupInlineAsmIdentifier() callback function return a
*NamedDecl.  In turn, build the expressions after we're finished parsing the
asm.  This avoids a crasher if the lookup fails.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166212 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-18 19:39:30 +00:00
Chad Rosier
b1f8c139c5 [ms-inline asm] Move most of the AsmParsing logic in clang back into the MC
layer.  Add the ParseMSInlineAsm() function, which is the new interface to 
clang.  Also expose the new MCAsmParserSemaCallback interface, which is used
by the back-end to do name lookup in Sema.  Finally, remove the now defunct
APIs introduced in r165946.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166183 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-18 15:49:34 +00:00
Chad Rosier
c5ac87d067 [ms-inline asm] Add the helper function, isParseringInlineAsm(). To be used in a future commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166054 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-16 20:16:20 +00:00
Michael Liao
b21d9aebba Check .rela instead of ELF64 for the compensation vaue resetting
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166051 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-16 19:49:51 +00:00
Chad Rosier
127f5edfd9 [ms-inline asm] If we parsed a statement and the opcode is valid, then it's an instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165955 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-15 19:08:18 +00:00
Chad Rosier
8f138d1121 [ms-inline asm] Add a few new APIs to the AsmParser class in support of MS-Style
inline assembly.  For the time being, these will be called directly by clang.
However, in the near future I expect these to be sunk back into the MC layer
and more basic APIs (e.g., getClobbers(), getConstraints(), etc.) will be called
by clang.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165946 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-15 17:19:13 +00:00
Adhemerval Zanella
f35c62bf02 PowerPC: add EmitTCEntry class for TOC creation
This patch replaces the EmitRawText by a EmitTCEntry class (specialized for
each Streamer) in PowerPC64 TOC entry creation.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165940 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-15 15:43:14 +00:00
Chad Rosier
84125ca43c [ms-inline asm] Remove the MatchInstruction() function. Previously, this was
the interface between the front-end and the MC layer when parsing inline
assembly.  Unfortunately, this is too deep into the parsing stack. Specifically,
we're unable to handle target-independent assembly (i.e., assembly directives,
labels, etc.).  Note the MatchAndEmitInstruction() isn't the correct
abstraction either.  I'll be exposing target-independent hooks shortly, so this
is really just a cleanup.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165858 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-13 00:26:04 +00:00
Chad Rosier
4f8d27338e Whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165540 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-09 20:15:02 +00:00
Eric Christopher
5b4461c0f1 Add names for the accelerator table sections so that they can
be emitted if they're wanted on elf platforms.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165432 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-08 21:41:30 +00:00