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3 Commits

Author SHA1 Message Date
Juergen Ributzka
46d6fd2908 [FastISel][AArch64] Fold mul into add/sub and logical operations. 
Try to fold the multiply into the add/sub or logical operations (when
possible).

This is related to rdar://problem/18369687.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217978 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-09-17 19:51:38 +00:00
Juergen Ributzka
5bf1f01c15 [FastISel][AArch64] Add support for non-native types for logical ops. 
Extend the logical ops selection to also support non-native types such as i1,
i8, and i16.

Fixes rdar://problem/18330589.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217732 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-09-13 23:46:28 +00:00
Juergen Ributzka
68a4ab08b3 [FastISel][AArch64] Add target-specific lowering for logical operations. 
This change adds support for immediate and shift-left folding into logical
operations.

This fixes rdar://problem/18223183.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217118 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-09-04 01:29:18 +00:00