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18373 Commits

Author SHA1 Message Date
Jeff Cohen
e4aee1d3a4 Fix recent regression that broke several llvm-tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35996 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-14 16:55:19 +00:00
Anton Korobeynikov
e01017bba4 Fix PR1325: Case range optimization was performed in the case it 
shouldn't. Also fix some "latent" bug on 64-bit platforms


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35990 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-14 13:25:55 +00:00
Chris Lattner
3ff981749b disable shift/and lowering to work around PR1325 for now. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35985 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-14 02:26:56 +00:00
Chris Lattner
35b9b49fd1 Implement a few missing xforms: printf("foo\n") -> puts. printf("x") -> putchar 
printf("") -> noop.  Still need to do the xforms for fprintf.

This implements Transforms/SimplifyLibCalls/Printf.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35984 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-14 01:17:48 +00:00
Chris Lattner
8264a9fcca in addition to merging, constantmerge should also delete trivially dead globals, 
in order to clean up after simplifylibcalls.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35982 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-14 01:11:54 +00:00
Chris Lattner
6fe5541003 Implement PR1201 and test/Transforms/InstCombine/malloc-free-delete.ll 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35981 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-14 00:20:02 +00:00
Chris Lattner
f25646bfb3 use an accessor to simplify code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35979 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-14 00:17:39 +00:00
Chris Lattner
6f771d4351 add GetElementPtrInst::hasAllZeroIndices, a long-overdue helper method. 
Writing it twice in the same day was too much for me.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35978 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-14 00:12:57 +00:00
Reid Spencer
0468ab3025 We want the number of bits needed, not the power of 2. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35977 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-14 00:00:10 +00:00
Jeff Cohen
614408dc48 Silence VC++ warning. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35975 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-13 22:52:03 +00:00
Chris Lattner
c5494af8a9 Now that codegen prepare isn't defeating me, I can finally fix what I set 
out to do! :)

This fixes a problem where LSR would insert a bunch of code into each MBB
that uses a particular subexpression (e.g. IV+base+C).  The problem is that
this code cannot be CSE'd back together if inserted into different blocks.

This patch changes LSR to attempt to insert a single copy of this code and
share it, allowing codegenprepare to duplicate the code if it can be sunk
into various addressing modes.  On CodeGen/ARM/lsr-code-insertion.ll,
for example, this gives us code like:

        add r8, r0, r5
        str r6, [r8, #+4]
..
        ble LBB1_4      @cond_next
LBB1_3: @cond_true
        str r10, [r8, #+4]
LBB1_4: @cond_next
...
LBB1_5: @cond_true55
        ldr r6, LCPI1_1
        str r6, [r8, #+4]

instead of:

        add r10, r0, r6
        str r8, [r10, #+4]
...
        ble LBB1_4      @cond_next
LBB1_3: @cond_true
        add r8, r0, r6
        str r10, [r8, #+4]
LBB1_4: @cond_next
...
LBB1_5: @cond_true55
        add r8, r0, r6
        ldr r10, LCPI1_1
        str r10, [r8, #+4]

Besides being smaller and more efficient, this makes it immediately
obvious that it is profitable to predicate LBB1_3 now :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35972 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-13 20:42:26 +00:00
Chris Lattner
dd77df3cbc Completely rewrite addressing-mode related sinking of code. In particular, 
this fixes problems where codegenprepare would sink expressions into load/stores
that are not valid, and fixes cases where it would miss important valid ones.

This fixes several serious codesize and perf issues, particularly on targets
with complex addressing modes like arm and x86.  For example, now we compile
CodeGen/X86/isel-sink.ll to:

_test:
        movl 8(%esp), %eax
        movl 4(%esp), %ecx
        cmpl $1233, %eax
        ja LBB1_2       #F
LBB1_1: #T
        movl $4, (%ecx,%eax,4)
        movl $141, %eax
        ret
LBB1_2: #F
        movl (%ecx,%eax,4), %eax
        ret

instead of:

_test:
        movl 8(%esp), %eax
        leal (,%eax,4), %ecx
        addl 4(%esp), %ecx
        cmpl $1233, %eax
        ja LBB1_2       #F
LBB1_1: #T
        movl $4, (%ecx)
        movl $141, %eax
        ret
LBB1_2: #F
        movl (%ecx), %eax
        ret


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35970 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-13 20:30:56 +00:00
Reid Spencer
57ae4f5f01 Implement a getBitsNeeded method to determine how many bits are needed to 
represent a string in binary form by an APInt.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35968 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-13 19:19:07 +00:00
Devang Patel
4beccb897d Remove use of SlowOperationInformer. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35967 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-13 18:58:18 +00:00
Devang Patel
60b0d84594 Undo previous check-in. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35966 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-13 18:35:15 +00:00
Devang Patel
02c768608a Hello uses LLVMSupport.a (SlowerOperationInformer) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35965 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-13 18:28:23 +00:00
Anton Korobeynikov
8085bcfdca Fix PR1323 : we haven't updated phi nodes in good manner :) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35963 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-13 06:53:51 +00:00
Chris Lattner
5a3d40d88f arm has r+r*s and r+i addr modes, but no r+i+r*s addr modes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35962 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-13 06:50:55 +00:00
Zhou Sheng
daacf22537 Make the apint construction more effective. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35960 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-13 05:57:32 +00:00
Chris Lattner
7fec90ebf4 CSE simple binary expressions when they are inserted. This makes LSR produce 
less huge code that needs to be cleaned up by sdisel.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35959 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-13 05:04:18 +00:00
Reid Spencer
57c5b1815d Implement review feedback .. don't double search a set. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35957 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-12 21:57:15 +00:00
Reid Spencer
df41353497 Make sure intrinsics that are lowered to functions make the function weak 
linkage so we only end up with one of them in a program. These are, after
all overloaded and templatish in nature.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35956 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-12 21:53:38 +00:00
Reid Spencer
69f80a63a2 Provide support for intrinsics that lower themselves to a function body. 
This can happen for intrinsics that are overloaded.  In such cases it is
necessary to emit a function prototype before the body of the function
that calls the intrinsic and to ensure we don't emit it multiple times.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35954 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-12 21:00:45 +00:00
Lauro Ramos Venancio
26ca64c884 Implement Thread Local Storage (TLS) in CBackend. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35951 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-12 18:42:08 +00:00
Lauro Ramos Venancio
c763552299 Implement the "thread_local" keyword. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35950 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-12 18:32:50 +00:00
Reid Spencer
eeedcb6905 Fix bugs in generated code for part_select and part_set so that llc doesn't 
barf when CBE is run with a program that contains these intrinsics.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35946 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-12 13:30:14 +00:00
Reid Spencer
37958093c6 Fix a bug in PartSet. The replacement value needs to be zext or trunc to 
the size of the value, not just zext. Also, give better names to two BBs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35945 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-12 12:46:33 +00:00
Chris Lattner
3a508c94a6 the result of an inline asm copy can be an arbitrary VT that the register 
class supports.  In the case of vectors, this means we often get the wrong
type (e.g. we get v4f32 instead of v8i16).  Make sure to convert the vector
result to the right type.  This fixes CodeGen/X86/2007-04-11-InlineAsmVectorResult.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35944 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-12 06:00:20 +00:00
Chris Lattner
4829b1c6ab fold noop vbitconvert instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35943 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-12 05:58:43 +00:00
Chris Lattner
c2941779c3 Fix weirdness handling single element vectors. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35941 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-12 04:44:28 +00:00
Chris Lattner
6c284d716e Fix mmx paddq, add support for the 'y' register class, though it isn't tested. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35940 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-12 04:14:49 +00:00
Reid Spencer
f75b874957 For PR1284: 
Implement the "part_set" intrinsic.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35938 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-12 02:48:46 +00:00
Chris Lattner
69d6f1358c improve the patch for PR1318 to also support grouped options with custom 
handlers (like the pass list).  My previous fix only supported *new* command
line options, not additions to old ones.

This fixes test/Feature/load_module.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35935 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-12 00:36:29 +00:00
Chris Lattner
a1b253f58e Fix CodeGen/X86/2007-03-24-InlineAsmPModifier.ll 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35926 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-11 22:29:46 +00:00
Reid Spencer
3234b3e1f2 Build Hello by default so it can be used in test cases. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35922 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-11 21:03:37 +00:00
Chris Lattner
c24bbaddf8 fix an infinite loop compiling ldecod, notice by JeffC. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35910 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-11 16:51:53 +00:00
Chris Lattner
e11529438c Fix incorrect fall-throughs in addr mode code. This fixes CodeGen/ARM/arm-negative-stride.ll 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35909 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-11 16:17:12 +00:00
Chris Lattner
ab46275683 Fix Transforms/ScalarRepl/union-pointer.ll 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35906 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-11 15:45:25 +00:00
Chris Lattner
159b0a4340 Fix PR1318 by reacting appropriately to a mutating option list. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35905 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-11 15:35:18 +00:00
Reid Spencer
97c0e2107b Fix a bug where ICmpInst objects instantiated directly with a name would 
not retain that name. Not noticed because AsmParser always sets name after
construction. However, llvm2cpp noticed.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35903 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-11 13:04:48 +00:00
Reid Spencer
2cd43e402a Fix an approximate calculation in an assertion not to give false negatives. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35901 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-11 13:00:04 +00:00
Chris Lattner
8a9f571052 Turn stuff like: 
icmp slt i32 %X, 0              ; <i1>:0 [#uses=1]
        sext i1 %0 to i32               ; <i32>:1 [#uses=1]

into:

        %X.lobit = ashr i32 %X, 31              ; <i32> [#uses=1]

This implements InstCombine/icmp.ll:test[34]


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35891 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-11 06:57:46 +00:00
Chris Lattner
a2e2c9bbf3 Simplify some comparisons to arithmetic, this implements: 
Transforms/InstCombine/icmp.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35890 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-11 06:53:04 +00:00
Chris Lattner
1eba01e9a0 Fix this harder. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35888 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-11 06:50:51 +00:00
Chris Lattner
c56a81dff1 don't create shifts by zero, fix some problems with my previous patch 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35887 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-11 06:43:25 +00:00
Chris Lattner
ba41783dbb canonicalize (x <u 2147483648) -> (x >s -1) and (x >u 2147483647) -> (x <s 0) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35886 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-11 06:12:58 +00:00
Chris Lattner
66bc325bff fix a miscompilation of: 
define i32 @test(i32 %X) {
entry:
        %Y = and i32 %X, 4              ; <i32> [#uses=1]
        icmp eq i32 %Y, 0               ; <i1>:0 [#uses=1]
        sext i1 %0 to i32               ; <i32>:1 [#uses=1]
        ret i32 %1
}

by moving code out of commonIntCastTransforms into visitZExt.  Simplify the
APInt gymnastics in it etc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35885 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-11 05:45:39 +00:00
Chris Lattner
b062000c23 done 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35884 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-11 05:34:00 +00:00
Chris Lattner
20a35c3fa5 Teach the codegen to turn [aez]ext (setcc) -> selectcc of 1/0, which often 
allows other simplifications.  For example, this compiles:
int isnegative(unsigned int X) {
   return !(X < 2147483648U);
}

Into this code:

x86:
        movl 4(%esp), %eax
        shrl $31, %eax
        ret
arm:
        mov r0, r0, lsr #31
        bx lr
thumb:
        lsr r0, r0, #31
        bx lr

instead of:

x86:
        cmpl $0, 4(%esp)
        sets %al
        movzbl %al, %eax
        ret

arm:
        mov r3, #0
        cmp r0, #0
        movlt r3, #1
        mov r0, r3
        bx lr

thumb:
        mov r2, #1
        mov r1, #0
        cmp r0, #0
        blt LBB1_2      @entry
LBB1_1: @entry
        cpy r2, r1
LBB1_2: @entry
        cpy r0, r2
        bx lr

Testcase here: test/CodeGen/Generic/ispositive.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35883 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-11 05:32:27 +00:00
Chris Lattner
1982ef20c4 Codegen integer abs more efficiently using the trick from the PPC CWG. This 
improves codegen on many architectures.  Tests committed as CodeGen/*/iabs.ll

X86 Old:			X86 New:
_test:				_test:
   movl 4(%esp), %ecx		   movl 4(%esp), %eax
   movl %ecx, %eax		   movl %eax, %ecx
   negl %eax			   sarl $31, %ecx
   testl %ecx, %ecx		   addl %ecx, %eax
   cmovns %ecx, %eax		   xorl %ecx, %eax
   ret				   ret

PPC Old:			PPC New:
_test:				_test:
   cmpwi cr0, r3, -1		   srawi r2, r3, 31
   neg r2, r3			   add r3, r3, r2
   bgt cr0, LBB1_2 ;		   xor r3, r3, r2
LBB1_1: ;			   blr
   mr r3, r2
LBB1_2: ;
   blr

ARM Old:			ARM New:
_test:				_test:
   rsb r3, r0, #0		   add r3, r0, r0, asr #31
   cmp r0, #0			   eor r0, r3, r0, asr #31
   movge r3, r0			   bx lr
   mov r0, r3
   bx lr

Thumb Old:			Thumb New:
_test:				_test:
   neg r2, r0			   asr r2, r0, #31
   cmp r0, #0			   add r0, r0, r2
   bge LBB1_2			   eor r0, r2
LBB1_1: @			   bx lr
   cpy r0, r2
LBB1_2: @
   bx lr


Sparc Old:			Sparc New:
test:				test:
   save -96, %o6, %o6		   save -96, %o6, %o6
   sethi 0, %l0			   sra %i0, 31, %l0
   sub %l0, %i0, %l0		   add %i0, %l0, %l1
   subcc %i0, -1, %l1		   xor %l1, %l0, %i0
   bg .BB1_2			   restore %g0, %g0, %g0
   nop				   retl
.BB1_1:				   nop
   or %g0, %l0, %i0
.BB1_2:
   restore %g0, %g0, %g0
   retl
   nop

It also helps alpha/ia64 :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35881 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-11 05:11:38 +00:00