Commit Graph

229 Commits

Author SHA1 Message Date
Evan Cheng
e077ef6e85 Fixed some spiller bugs exposed by the recent two-address code changes. Now
there may be other def(s) apart from the use&def two-address operand. We need
to check if the register reuse for a use&def operand may conflicts with another
def. Provide a mean to recover from the conflict if it is detected when the
defs are processed later.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31439 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-04 00:21:55 +00:00
Evan Cheng
e6ae14e1f4 Rename
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31364 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-01 23:18:32 +00:00
Evan Cheng
360c2dd25a Two-address instructions no longer have to be A := A op C. Now any pair of dest / src operands can be tied together.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31363 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-01 23:06:55 +00:00
Chris Lattner
6ec3626be4 restore my previous patch, now that the X86 backend bug has been fixed:
http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20061009/038518.html


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30906 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-12 17:45:38 +00:00
Evan Cheng
b870100f2a Backing out Chris' last commit. It's breaking llvm-gcc bootstrapping.
It's turning:
        movl -24(%ebp), %esp
        subl $16, %esp
        movl -24(%ebp), %ecx
into
        movl -24(%ebp), %esp
        subl $16, %esp
        movl %esp, (%esp)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30902 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-12 08:00:47 +00:00
Chris Lattner
f183cabba8 If we see a load from a stack slot into a physreg, consider it as providing
the stack slot.  This fixes PR943.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30898 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-12 02:34:07 +00:00
Chris Lattner
2926869b4a Fix a long-standing wart in the code generator: two-address instruction lowering
actually *removes* one of the operands, instead of just assigning both operands
the same register.  This make reasoning about instructions unnecessarily complex,
because you need to know if you are before or after register allocation to match
up operand #'s with the target description file.

Changing this also gets rid of a bunch of hacky code in various places.

This patch also includes changes to fold loads into cmp/test instructions in
the X86 backend, along with a significant simplification to the X86 spill
folding code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30108 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-05 02:12:02 +00:00
Chris Lattner
a4f0b3a084 s|llvm/Support/Visibility.h|llvm/Support/Compiler.h|
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29911 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-27 12:54:02 +00:00
Chris Lattner
f7da2c7b0c Take advantage of the recent improvements to the liveintervals set (tracking
instructions which define each value#) to simplify and improve the coallescer.
In particular, this patch:

1. Implements iterative coallescing.
2. Reverts an unsafe hack from handlePhysRegDef, superceeding it with a
   better solution.
3. Implements PR865, "coallescing" away the second copy in code like:

   A = B
   ...
   B = A

This also includes changes to symbolically print registers in intervals
when possible.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29862 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-24 22:43:55 +00:00
Bill Wendling
d36d03bf2d Added a check so that if we have two machine instructions in this form
MOV R0, R1
    MOV R1, R0

the second machine instruction is removed. Added a regression test.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29792 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-21 07:33:33 +00:00
Jim Laskey
cd4317efcf Eliminate data relocations by using NULL instead of global empty list.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29250 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-21 21:15:20 +00:00
Andrew Lenharth
ed41f1bb19 Reduce number of exported symbols
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29220 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-20 17:28:38 +00:00
Chris Lattner
f8c68f694c Shave another 27K off libllvmgcc.dylib with visibility hidden
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28973 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-28 22:17:39 +00:00
Chris Lattner
e53f4a055f Move some methods out of MachineInstr into MachineOperand
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28102 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-04 17:52:23 +00:00
Chris Lattner
229924a79f Fix a latent bug that my spiller patch last week exposed: we were leaving
instructions in the virtregfolded map that were deleted.  Because they
were deleted, newly allocated instructions could end up at the same address,
magically finding themselves in the map.  The solution is to remove entries
from the map when we delete the instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28041 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-01 22:03:24 +00:00
Chris Lattner
8a18c13fa5 When promoting a load to a reg-reg copy, where the load was a previous
instruction folded with spill code, make sure the remove the load from
the virt reg folded map.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28040 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-01 21:17:10 +00:00
Chris Lattner
35f2705e3d Remove previous patch, which wasn't quite right.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28039 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-01 21:16:03 +00:00
Evan Cheng
10dbd3ead8 Remove temp. option -spiller-check-liveout, it didn't cause any failure nor performance regressions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28029 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-01 08:54:57 +00:00
Evan Cheng
200370fb56 Local spiller kills a store if the folded restore is turned into a copy.
But this is incorrect if the spilled value live range extends beyond the
current BB.
It is currently controlled by a temporary option -spiller-check-liveout.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28024 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-30 08:41:47 +00:00
Chris Lattner
ba1fc3daf7 Mapping of physregs can make it so that the designated and input physregs are
the same.  In this case, don't emit a noop copy.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28008 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-28 04:43:18 +00:00
Chris Lattner
addc55af6c When we have a two-address instruction where the input cannot be clobbered
and is already available, instead of falling back to emitting a load, fall
back to emitting a reg-reg copy.  This generates significantly better code
for some SSE testcases, as SSE has lots of two-address instructions and
none of them are read/modify/write.  As one example, this change does:

        pshufd %XMM5, XMMWORD PTR [%ESP + 84], 255
        xorps %XMM2, %XMM5
        cmpltps %XMM1, %XMM0
-       movaps XMMWORD PTR [%ESP + 52], %XMM0
-       movapd %XMM6, XMMWORD PTR [%ESP + 52]
+       movaps %XMM6, %XMM0
        cmpltps %XMM6, XMMWORD PTR [%ESP + 68]
        movapd XMMWORD PTR [%ESP + 52], %XMM6
        movaps %XMM6, %XMM0
        cmpltps %XMM6, XMMWORD PTR [%ESP + 36]
        cmpltps %XMM3, %XMM0
-       movaps XMMWORD PTR [%ESP + 20], %XMM0
-       movapd %XMM7, XMMWORD PTR [%ESP + 20]
+       movaps %XMM7, %XMM0
        cmpltps %XMM7, XMMWORD PTR [%ESP + 4]
        movapd XMMWORD PTR [%ESP + 20], %XMM7
        cmpltps %XMM4, %XMM0

... which is far better than a store followed by a load!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28001 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-28 01:46:50 +00:00
Chris Lattner
28bad08411 Fix a bug that Evan exposed with some changes he's making, and that was
exposed with a fastcc problem (breaking pcompress2 on x86 with -enable-x86-fastcc).

When reloading a reused reg, make sure to invalidate the reloaded reg, and
check to see if there are any other pending uses of the same register.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26369 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-25 02:17:31 +00:00
Chris Lattner
47cb7173ea Remove debugging printout :)
Add a minor compile time win, no codegen change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26368 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-25 02:03:40 +00:00
Chris Lattner
540fec6b38 Refactor some code from being inline to being out in a new class with methods.
This gets rid of two gotos, which is always nice, and also adds some comments.

No functionality change, this is just a refactor.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26367 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-25 01:51:33 +00:00
Jeff Cohen
003cecbc9d Fix VC++ warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25957 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-04 03:27:39 +00:00
Chris Lattner
8666249ad6 Handle another case exposed on X86.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25949 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-03 23:50:46 +00:00
Chris Lattner
593c95878b Fix a nasty problem on two-address machines in the following situation:
store EAX -> [ss#0]
[ss#0] += 1
...
use(EAX)

In this case, it is not valid to rewrite this as:


store EAX -> [ss#0]
EAX += 1
store EAX -> [ss#0]  ;;; this would also delete the store above
...
use(EAX)

... because EAX is not a dead at that point.  Keep track of which registers
we are allowed to clobber, and which ones we aren't, and don't clobber the
ones we're not supposed to.  :)

This should resolve the issues on X86 last night.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25948 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-03 23:28:46 +00:00
Chris Lattner
66cf80f226 significantly simplify the VirtRegMap code by pulling the SpillSlotsAvailable
and PhysRegsAvailable maps out into a new AvailableSpills struct.  No
functionality change.

This paves the way for a bugfix, coming up next.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25947 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-03 23:13:58 +00:00
Jeff Cohen
2ba0b02e15 Fix VC++ compilation error caused by using a std::map iterator variable to receive
a std::multimap iterator value.  For some reason, GCC doesn't have a problem with this.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25927 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-03 03:48:54 +00:00
Chris Lattner
109afed40b Remove move copies and dead stuff by not clobbering the result reg of a noop copy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25926 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-03 03:16:14 +00:00
Chris Lattner
84e752a812 Simplify some code
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25924 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-03 03:06:49 +00:00
Chris Lattner
1118d25d39 Add code that checks for noop copies, which triggers when either:
1. a target doesn't know how to fold load/stores into copies, or
2. the spiller rewrites the input to a copy to the same register as the dest
   instead of to the reloaded reg.

This will be moved/improved in the near future, but allows elimination of
some ancient x86 hacks.  This eliminates 92 copies from SMG2000 on X86 and
163 copies from 252.eon.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25922 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-03 02:02:59 +00:00
Chris Lattner
07cf14112d Physregs may hold multiple stack slot values at the same time. Keep track
of this, and use it to our advantage (bwahahah).  This allows us to eliminate another
60 instructions from smg2000 on PPC (probably significantly more on X86).  A common
old-new diff looks like this:

        stw r2, 3304(r1)
-       lwz r2, 3192(r1)
        stw r2, 3300(r1)
-       lwz r2, 3192(r1)
        stw r2, 3296(r1)
-       lwz r2, 3192(r1)
        stw r2, 3200(r1)
-       lwz r2, 3192(r1)
        stw r2, 3196(r1)
-       lwz r2, 3192(r1)
+       or r2, r2, r2
        stw r2, 3188(r1)

and

-       lwz r31, 604(r1)
-       lwz r13, 604(r1)
-       lwz r14, 604(r1)
-       lwz r15, 604(r1)
-       lwz r16, 604(r1)
-       lwz r30, 604(r1)
+       or r31, r30, r30
+       or r13, r30, r30
+       or r14, r30, r30
+       or r15, r30, r30
+       or r16, r30, r30
+       or r30, r30, r30

Removal of the R = R copies is coming next...


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25919 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-03 00:36:31 +00:00
Chris Lattner
cd81639d2e Fix a deficiency in the spiller that Evan noticed. In particular, consider
this code:

  store [stack slot #0],  R10
    = add R14, [stack slot #0]

The spiller didn't know that the store made the value of [stackslot#0] available
in R10 *IF* the store came from a copy instruction with the store folded into it.

This patch teaches VirtRegMap to look at these stores and recognize the values
they make available.  In one case Evan provided, this code:

        divsd %XMM0, %XMM1
        movsd %XMM1, QWORD PTR [%ESP + 40]
1)      movsd QWORD PTR [%ESP + 48], %XMM1
2)      movsd %XMM1, QWORD PTR [%ESP + 48]
        addsd %XMM1, %XMM0
3)      movsd QWORD PTR [%ESP + 48], %XMM1
        movsd QWORD PTR [%ESP + 4], %XMM0

turns into:

        divsd %XMM0, %XMM1
        movsd %XMM1, QWORD PTR [%ESP + 40]
        addsd %XMM1, %XMM0
3)      movsd QWORD PTR [%ESP + 48], %XMM1
        movsd QWORD PTR [%ESP + 4], %XMM0

In this case, instruction #2 was removed because of the value made
available by #1, and inst #1 was later deleted because it is now
never used before the stack slot is redefined by #3.

This occurs here and there in a lot of code with high spilling, on PPC
most of the removed loads/stores are LSU-reject-causing loads, which is
nice.

On X86, things are much better (because it spills more), where we nuke
about 1% of the instructions from SMG2000 and several hundred from eon.

More improvements to come...


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25917 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-02 23:29:36 +00:00
Chris Lattner
4083960147 Move isLoadFrom/StoreToStackSlot from MRegisterInfo to TargetInstrInfo,a far more logical place. Other methods should also be moved if anyoneis interested. :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25913 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-02 20:12:32 +00:00
Chris Lattner
2c2c6c61f1 Add explicit #includes of <iostream>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25515 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-22 23:41:00 +00:00
Chris Lattner
172c362fef Add an assertion, update DefInst even though no one uses it (dangling pointers
don't help anyone)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25081 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-04 06:47:48 +00:00
Chris Lattner
8a61a7524a Fix the LLC regressions on X86 last night. In particular, when undoing
previous copy elisions and we discover we need to reload a register, make
sure to use the regclass of the original register for the reload, not the
class of the current register.  This avoid using 16-bit loads to reload 32-bit
values.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23645 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-06 17:19:06 +00:00
Chris Lattner
22480c4350 Fix a bug in the local spiller, where we could take code like this:
store r12 -> [ss#2]
  R3 = load [ss#1]
  use R3
  R3 = load [ss#2]
  R4 = load [ss#1]

and turn it into this code:

  store R12 -> [ss#2]
  R3 = load [ss#1]
  use R3
  R3 = R12
  R4 = R3    <- oops!

The problem was that promoting R3 = load[ss#2] to a copy missed the fact that
the instruction invalidated R3 at that point.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23638 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-05 18:30:19 +00:00
Chris Lattner
bf9716b9c4 Change this code ot pass register classes into the stack slot spiller/reloader
code.  PrologEpilogInserter hasn't been updated yet though, so targets cannot
use this info.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23536 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-30 01:29:00 +00:00
Chris Lattner
cea8688ee4 Teach the local spiller to turn stack slot loads into register-register copies
when possible, avoiding the load (and avoiding the copy if the value is already
in the right register).

This patch came about when I noticed code like the following being generated:

  store R17 -> [SS1]
  ...blah...
  R4 = load [SS1]

This was causing an LSU reject on the G5.  This problem was due to the register
allocator folding spill code into a reg-reg copy (producing the load), which
prevented the spiller from being able to rewrite the load into a copy, despite
the fact that the value was already available in a register.  In the case
above, we now rip out the R4 load and replace it with a R4 = R17 copy.

This speeds up several programs on X86 (which spills a lot :) ), e.g.
smg2k from 22.39->20.60s, povray from 12.93->12.66s, 168.wupwise from
68.54->53.83s (!), 197.parser from 7.33->6.62s (!), etc.  This may have a larger
impact in some cases on the G5 (by avoiding LSU rejects), though it probably
won't trigger as often (less spilling in general).

Targets that implement folding of loads/stores into copies should implement
the isLoadFromStackSlot hook to get this.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23388 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-19 06:56:21 +00:00
Chris Lattner
50ea01ed5b Use continue in the use-processing loop to make it clear what the early exits
are, simplify logic, and cause things to not be nested as deeply.  This also
uses MRI->areAliases instead of an explicit loop.

No functionality change, just code cleanup.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23296 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-09 20:29:51 +00:00
Misha Brukman
edf128a7fa Remove trailing whitespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21420 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-21 22:36:52 +00:00
Chris Lattner
886dd9136f Make sure to notice that explicit physregs are used in the function
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21084 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-04 21:35:34 +00:00
Chris Lattner
b0f31bf19b Update these register allocators to set the PhysRegUsed info in MachineFunction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19791 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-23 22:45:13 +00:00
Chris Lattner
8f1d6402ba Improve compatibility with acc
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19549 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-14 15:54:24 +00:00
Chris Lattner
27f291600b Clean up the MachineBasicBlock.h file, percolating #includes into this file.
Patch contributed by Morten Ofstad


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17251 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-26 15:35:58 +00:00
Chris Lattner
47eb6567e2 This patch fixes the nasty bug that caused 175.vpr to fail for X86 last night.
The problem occurred when trying to reload this instruction:

MOV32mr %reg2326, 8, %reg2297, 4, %reg2295

The value of reg2326 was available in EBX, so it was reused from there, instead
of reloading it into EDX.

The value of reg2297 was available in EDX, so it was reused from there, instead
of reloading it into EDI.

The value of reg2295 was not available, so we tried reloading it into EBX, its
assigned register.  However, we checked and saw that we already reloaded
something into EBX, so we chose what reg2326 was assigned to (EDX) and reloaded
into that register instead.

Unfortunately EDX had already been used by reg2297, so reloading into EDX
clobbered the value used by the reg2326 operand, breaking the program.

The fix for this is to check that the newly picked register is ok.  In this
case we now find that EDX is already used and try using EDI, which succeeds.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17006 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-15 03:19:31 +00:00
Chris Lattner
8df6a594d2 This patch adds and improves debugging output. No functionality changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17005 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-15 03:16:29 +00:00
Chris Lattner
7cf3490892 Do not repeat the map lookup
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16633 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-01 23:16:43 +00:00
Chris Lattner
bec6a9ea12 When a virtual register is folded into an instruction, keep track of whether
it was a use, def, or both.  This allows us to be less pessimistic in our
analysis of them.  In practice, this doesn't make a big difference, but it
doesn't hurt either.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16632 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-01 23:15:36 +00:00
Chris Lattner
52b25db3ef Add a simple little improvement to the local spiller to keep track of stores
and delete them if they turn out to be dead.  This is a useful little hack
that even speeds up some programs.  For example, it speeds up Ptrdist/ks
from 17.53s to 15.59s, and 188.ammp from 149s to 146s.

This also speeds up llc :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16630 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-01 19:47:12 +00:00
Chris Lattner
7fb64347d7 Substantially revamp the local spiller, causing it to actually improve the
generated code over the simple spiller.  The new local spiller generates
substantially better code than the simple one in some cases, by reusing
values that are loaded out of stack slots and kept available in registers.

This primarily helps programs that are spilling a lot, and there is still
stuff that can be done to improve it.  This patch makes the local spiller
the default, as it's only a tiny bit slower than the simple spiller (it
increases the runtime of llc by < 1%).

Here are some numbers with speedups.

Program    #reuse  old(s)    new(s)  Speedup

Povray:     3452,  16.87 ->  15.93   (5.5%)
177.mesa:   2176,   2.77 ->   2.76   (0%)
179.art:      35,  28.43 ->  28.01   (1.5%)
183.equake:   55,  61.44 ->  61.41   (0%)
188.ammp:    869, 174    -> 149      (15%)

164.gzip:     43,  40.73 ->  40.71   (0%)
175.vpr:     351,  18.54 ->  17.34   (6.5%)
176.gcc:    2471,   5.01 ->   4.92   (1.8%)
181.mcf       42,  79.30 ->  75.20   (5.2%)
186.crafty:  484,  29.73 ->  30.04   (-1%)
197.parser:  251,  10.47 ->  10.67   (-1%)
252.eon:    1501,   1.98 ->   1.75   (12%)
253.perlbm: 1183,  14.83 ->  14.42   (2.8%)
254.gap:     825,   7.46 ->   7.29   (2.3%)
255.vortex:  285,  10.51 ->  10.27   (2.3%)
256.bzip2:    63,  55.70 ->  55.20   (0.9%)
300.twolf:   830,  21.63 ->  22.00   (-1%)

PtrDist/ks    14,  32.75 -> 17.53    (46.5%)
Olden/tsp     46,   8.71 ->  8.24    (5.4%)
Free/distray  70,   1.09 ->  0.99    (9.2%)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16629 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-01 19:04:51 +00:00
Chris Lattner
dbea9731b1 Use more efficient map operations. Fix a bug that would affect hypothetical
targets that supported multiple memory operands.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16614 91177308-0d34-0410-b5e6-96231b3b80d8
2004-09-30 16:35:08 +00:00
Chris Lattner
477e4555de There is no need to call MachineInstr::print directly, just send the MI& to an ostream.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16613 91177308-0d34-0410-b5e6-96231b3b80d8
2004-09-30 16:10:45 +00:00
Chris Lattner
0fc27ccdd3 Simplify the logic in the simple spiller and capitalize some variables
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16609 91177308-0d34-0410-b5e6-96231b3b80d8
2004-09-30 02:59:33 +00:00
Chris Lattner
5f7d2d45fd Switch from defaulting to the 'local' spiller to the 'simple' spiller. The
two spillers produce perfectly identical code (at least on povray and eon),
but the simple spiller is substantially faster than the local spiller. Once
the local spiller is improved, we can switch back.

Switching cuts 5.2% off of the llc time for povray (about 1.3s).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16608 91177308-0d34-0410-b5e6-96231b3b80d8
2004-09-30 02:40:06 +00:00
Chris Lattner
4ea1b828eb Don't use a densemap for keeping track of which vregs are already loaded, just
use a simple vector.  This speeds up -spiller=simple from taking 22s to taking
.1s on povray (debug build).  This change does not modify the generated code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16607 91177308-0d34-0410-b5e6-96231b3b80d8
2004-09-30 02:33:48 +00:00
Chris Lattner
7f690e6258 Use longer and more explicit names for instance vars (particularly important
data structures).  Fix the print method to send to the right ostream, not
always cerr.  Delete typedefs that are only used once.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16606 91177308-0d34-0410-b5e6-96231b3b80d8
2004-09-30 02:15:18 +00:00
Chris Lattner
8c4d88d369 Reindent code, improve comments, move huge nested methods out of classes,
prune #includes, add print/dump methods, etc.  No functionality changes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16604 91177308-0d34-0410-b5e6-96231b3b80d8
2004-09-30 01:54:45 +00:00
Reid Spencer
551ccae044 Changes For Bug 352
Move include/Config and include/Support into include/llvm/Config,
include/llvm/ADT and include/llvm/Support. From here on out, all LLVM
public header files must be under include/llvm/.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16137 91177308-0d34-0410-b5e6-96231b3b80d8
2004-09-01 22:55:40 +00:00
Chris Lattner
26eb14ba51 Stop using CreateStackObject(RegClass*)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15775 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-15 22:02:22 +00:00
Chris Lattner
57f1b67c34 These methods no longer take a TargetRegisterClass* operand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15774 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-15 21:56:44 +00:00
Brian Gaeke
7848e68c16 These files don't need to include <iostream> since they include "Support/Debug.h".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15089 91177308-0d34-0410-b5e6-96231b3b80d8
2004-07-21 20:50:33 +00:00
Chris Lattner
b8edf61fa9 Fix IA64 compatibility
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14866 91177308-0d34-0410-b5e6-96231b3b80d8
2004-07-16 00:06:01 +00:00
Tanya Lattner
b140762a45 Made a fix so that you can print out MachineInstrs that belong to a MachineBasicBlock that is not yet attached to a MachineFunction. This change includes changing the third operand (TargetMachine) to a pointer for the MachineInstr::print function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14389 91177308-0d34-0410-b5e6-96231b3b80d8
2004-06-25 00:13:11 +00:00
Chris Lattner
9bcdcd17c7 Adjust to new TargetMachine interface
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@13956 91177308-0d34-0410-b5e6-96231b3b80d8
2004-06-02 05:57:12 +00:00
Alkis Evlogimenos
38af59a43c Add method to assign stack slot to virtual register without creating a
new one.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@13895 91177308-0d34-0410-b5e6-96231b3b80d8
2004-05-29 20:38:05 +00:00
Alkis Evlogimenos
6a367f33f3 Spill explicit physical register defs as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12260 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-09 08:35:13 +00:00
Alkis Evlogimenos
5ae00066c6 As I wrote in the docs, simple is the default spiller :-)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12189 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-06 23:08:44 +00:00
Alkis Evlogimenos
499b2bad27 Add simple spiller.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12188 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-06 22:38:29 +00:00
Alkis Evlogimenos
dd420e060a Add a spiller option to llc. A simple spiller will come soon. When we get CFG in the machine code represenation a global spiller will also be possible. Also document the linear scan register allocator but mark it as experimental for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12062 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-01 23:18:15 +00:00
Alkis Evlogimenos
5f37502bfb Add the long awaited memory operand folding support for linear scan
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12058 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-01 20:05:10 +00:00
Alkis Evlogimenos
57af2cf6f3 Make spiller push stores right after the definition of a register so
that they are as far away from the loads as possible.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11895 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-27 04:51:35 +00:00
Alkis Evlogimenos
8fa16e47f8 Clear maps right after basic block is processed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11892 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-26 23:22:23 +00:00
Alkis Evlogimenos
e3fcabe068 Fix bugs found with recent addition of assertions in
MRegisterInfo::is{Physical,Virtual}Register.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11849 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-25 23:21:52 +00:00
Alkis Evlogimenos
4d0d864be3 Add DenseMap template and actually use it for for mapping virtual regs
to objects.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11840 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-25 21:55:45 +00:00
Alkis Evlogimenos
0d6c5b6489 Move machine code rewriter and spiller outside the register
allocator.

The implementation is completely rewritten and now employs several
optimizations not exercised before. For example for 164.gzip we have
997 loads and 699 stores vs the 1221 loads and 880 stores we have
before.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11798 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-24 08:58:30 +00:00
Alkis Evlogimenos
34d9bc9f16 Refactor VirtRegMap out of RegAllocLinearScan as the first part of bug
251 (providing a generic machine code rewriter/spiller).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11780 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-23 23:08:11 +00:00