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1156 Commits

Author SHA1 Message Date
Bob Wilson
e622087e20 Fix an obvious copy-and-paste error. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75566 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-14 00:23:44 +00:00
Bob Wilson
60206140a1 Revert 75309. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75562 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-14 00:01:42 +00:00
David Goodwin
ea670f1dd8 Fix FP elimination code to work for Thumb-2 addrmode AddrModeT2_so. This fixes SingleSource/Benchmarks/Stanford/Queens (among others). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75513 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-13 21:43:08 +00:00
Bob Wilson
d2559bf3f3 Fix comment typos. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75479 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-13 18:11:36 +00:00
Torok Edwin
29fd056d81 Remove extra \n from LLVM_UNREACHABLE calls. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75416 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-12 07:15:17 +00:00
Torok Edwin
c25e7581b9 assert(0) -> LLVM_UNREACHABLE. 
Make llvm_unreachable take an optional string, thus moving the cerr<< out of
line.
LLVM_UNREACHABLE is now a simple wrapper that makes the message go away for
NDEBUG builds.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75379 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-11 20:10:48 +00:00
Evan Cheng
ed338e80f9 Don't put IT instruction before conditional branches. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75361 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-11 07:26:20 +00:00
Evan Cheng
2f297df02e Smarter isel of ldrsb / ldrsh. Only make use of these when [r,r] address is feasible. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75360 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-11 07:08:13 +00:00
Evan Cheng
446c428bf3 Major changes to Thumb (not Thumb2). Many 16-bit instructions either modifies CPSR when they are outside the IT blocks, or they can predicated when in Thumb2. Move the implicit def of CPSR to an optional def which defaults CPSR. This allows the 's' bit to be toggled dynamically. 
A side-effect of this change is asm printer is now using unified assembly. There are some minor clean ups and fixes as well.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75359 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-11 06:43:01 +00:00
Evan Cheng
dd6f63209c 80 col violation. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75358 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-11 06:37:27 +00:00
Bob Wilson
1e44ed88eb Add superclasses of ARM Neon quad registers. The Q2PR class contains pairs of 
quad registers and the Q4PR class holds sets of 4 quad registers.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75309 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-10 23:09:06 +00:00
David Goodwin
3ca524e336 Predicate VFP instructions on HasVFP2 instead of IsARM. This allows VFP instructions with thumb-2. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75254 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-10 17:03:29 +00:00
David Goodwin
b1beca635f t2LDM_RET does not fall-through. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75250 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-10 15:33:46 +00:00
Duncan Sands
179bef3636 Add Thumb2ITBlockPass.cpp to CMakeLists.txt, fixing 
the cmake build.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75246 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-10 08:31:50 +00:00
Evan Cheng
b6264decdb More info about Thumb1 predication support. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75220 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-10 02:10:17 +00:00
Evan Cheng
892837abf3 We don't need separate thumb1 instructions tADDSi3 etc. for addc and subc. The "normal" version always modify condition register CPSR so we should just use def : pat to match to the same instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75219 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-10 02:09:04 +00:00
Evan Cheng
06e16587eb Add a thumb2 pass to insert IT blocks. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75218 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-10 01:54:42 +00:00
Evan Cheng
ab33150445 Move isPredicated from .cpp to .h 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75217 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-10 01:38:27 +00:00
Evan Cheng
b5619f42f4 80 col violation. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75212 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-10 00:45:16 +00:00
Evan Cheng
9c06178e35 Remove a bogus assertion. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75206 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-10 00:23:48 +00:00
Bob Wilson
97354f5181 Replace TM.getRegisterInfo() calls by TRI instance variable. 
Use getAsmName() method instead of accessing AsmName field directly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75205 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-10 00:14:05 +00:00
Bob Wilson
9b4b00ad43 Handle 'a' modifier on inline assembly operands. 
This is part of the fix for pr4521.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75201 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-09 23:54:51 +00:00
Evan Cheng
e5564748b7 Added Thumb IT instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75198 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-09 23:43:36 +00:00
Evan Cheng
896fe89f55 Another todo entry. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75192 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-09 23:17:28 +00:00
Evan Cheng
45032f2801 Initial support for load / store multiple opt pass Thumb2 support (post-allocation only). It's kind of there, but not quite. I'll return to this later. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75190 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-09 23:11:34 +00:00
Evan Cheng
c50a1cbf5f Fix ldm / stm unified syntax; add t2LDM_RET. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75188 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-09 22:58:39 +00:00
Evan Cheng
d75223d6c6 LDM_RET should be marked mayLoad. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75187 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-09 22:57:41 +00:00
Evan Cheng
5c874172ac Fix ldrd / strd address mode matching code. It allows for +/- 8 bit offset. Also change the printer to make the scale 4 explicit. 
Note, we are not yet generating these instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75181 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-09 22:21:59 +00:00
Evan Cheng
6dded67b0d Add a Thumb readme entry. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75173 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-09 20:50:52 +00:00
Evan Cheng
cba962dd6b Correct comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75172 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-09 20:40:44 +00:00
David Goodwin
8b98b85c64 Handle Thumb-2 addressing modes during FP elimination. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75158 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-09 18:35:52 +00:00
Owen Anderson
d1474d09cb Thread LLVMContext through MVT and related parts of SDISel. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75153 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-09 17:57:24 +00:00
Evan Cheng
1945b7b5c5 Reorg includes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75115 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-09 06:49:09 +00:00
David Goodwin
f1daf7d8ab Use common code for both ARM and Thumb-2 instruction and register info. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75067 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-08 23:10:31 +00:00
Evan Cheng
dda0f4cb79 - Add some NEON ld / st instruction static encoding. 
- Make bits 25-27 for ldrh, etc. explicitly zero. Previously only the JIT uses the encoding information and it's assuming anything not specified to be zero. Making them explicit so the disassembler is happy.
Patch by Sean Callanan.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75065 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-08 22:51:32 +00:00
Evan Cheng
e7cbe4118b Change how so_imm and t2_so_imm are handled. At instruction selection time, the immediates are no longer encoded in the imm8 + rot format, that are left as it is. The encoding is now done in ams printing and code emission time instead. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75048 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-08 21:03:57 +00:00
Torok Edwin
3046470919 Missed an exit during the conversion. 
Will convert assert(0) that don't have abort() to LLVM_UNREACHABLE in a later
commit.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75045 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-08 20:55:50 +00:00
Torok Edwin
dac237e182 Implement changes from Chris's feedback. 
Finish converting lib/Target.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75043 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-08 20:53:28 +00:00
Bob Wilson
2ed334694f Implement NEON vst1 instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75037 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-08 20:32:02 +00:00
David Goodwin
77521f5232 Generalize opcode selection in ARMBaseRegisterInfo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75036 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-08 20:28:28 +00:00
Xerxes Ranby
cecbc964e1 Fix cmake build. 
Added ARMBaseRegisterInfo.cpp to lib/Target/ARM/CMakeLists.txt


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75035 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-08 20:13:41 +00:00
David Goodwin
db5a71a8e0 Push methods into base class in preparation for sharing. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75020 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-08 18:31:39 +00:00
Bob Wilson
205a5ca6cf Implement NEON vld1 instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75019 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-08 18:11:30 +00:00
Torok Edwin
ab7c09b6b6 Start converting to new error handling API. 
cerr+abort -> llvm_report_error
assert(0)+abort -> LLVM_UNREACHABLE (assert(0)+llvm_unreachable-> abort() included)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75018 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-08 18:01:40 +00:00
David Goodwin
c140c4803d Start breaking out common base functionality for register info. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75016 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-08 17:28:55 +00:00
David Goodwin
334c26473b Checkpoint Thumb2 Instr info work. Generalized base code so that it can be shared between ARM and Thumb2. Not yet activated because register information must be generalized first. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75010 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-08 16:09:28 +00:00
Nick Lewycky
7f6aa2b162 Remove the vicmp and vfcmp instructions. Because we never had a release with 
these instructions, no autoupgrade or backwards compatibility support is
provided.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74991 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-08 03:04:38 +00:00
Evan Cheng
34a0fa362d Add a Thumb2 instruction flag to that indicates whether the instruction can be transformed to 16-bit variant. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74988 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-08 01:46:35 +00:00
Evan Cheng
c9a4153eef Add a todo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74976 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-08 00:05:05 +00:00
Evan Cheng
0fc0ade095 Also statically set bit 25 for BR_JT instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74974 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-07 23:45:10 +00:00