It cahced XOR's operands before calling visitXOR() but failed to update the
operands when visitXOR changed the XOR node.
rdar://12968664
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171999 91177308-0d34-0410-b5e6-96231b3b80d8
into a new function llvm::sys::PrintStackTrace, so that it's available to clients for logging purposes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171989 91177308-0d34-0410-b5e6-96231b3b80d8
1. Added debug messages when in OptimizeIndividualCalls we move calls into predecessors and then erase the original call.
2. Added debug messages when in the process of moving calls in ObjCARCOpt::MoveCalls we create new RR and delete old RR.
3. Added a debug message when we visit a specific retain instruction in ObjCARCOpt::PerformCodePlacement.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171988 91177308-0d34-0410-b5e6-96231b3b80d8
The bundle flags are used by MachineBasicBlock::print(), they don't need
to clutter up individual MachineInstrs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171986 91177308-0d34-0410-b5e6-96231b3b80d8
It is possible to build MI bundles that don't begin with a BUNDLE
header. Add support for such bundles, counting all instructions inside
the bundle.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171985 91177308-0d34-0410-b5e6-96231b3b80d8
This patch adjust the r171506 to make all DWARF enconding pc-relative
for PPC64. It also adds the R_PPC64_REL32 relocation handling in MCJIT
(since the eh_frame will not generate PIC-relative relocation) and also
adds the emission of stubs created by the TTypeEncoding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171979 91177308-0d34-0410-b5e6-96231b3b80d8
fp128 is almost but not quite completely illegal as a type on AArch64. As a
result it needs to have a register class (for argument passing mainly), but all
operations need to be lowered to runtime calls. Currently there's no way for
targets to do this (without duplicating code), as the relevant functions are
hidden in SelectionDAG. This patch changes that.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171971 91177308-0d34-0410-b5e6-96231b3b80d8
PR 14848. The lowered sequence is based on the existing sequence the target-independent
DAG Combiner creates for the scalar case.
Patch by Zvi Rackover.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171953 91177308-0d34-0410-b5e6-96231b3b80d8
This was an experimental option, but needs to be defined
per-target. e.g. PPC A2 needs to aggressively hide latency.
I converted some in-order scheduling tests to A2. Hal is working on
more test cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171946 91177308-0d34-0410-b5e6-96231b3b80d8
It's clearer and additionally this gets rid of the usage of `DefmID`,
which doesn't really correspond to anything in the language (it was just
used in the name of this parsing function which parsed a `MultiClassID`
and returned that multiclass's record).
This area of the code still needs a lot of work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171938 91177308-0d34-0410-b5e6-96231b3b80d8
It's not just def's but actually a limited subset of Object's that are
allowed inside a multiclass.
Spotted by Joel Jones.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171935 91177308-0d34-0410-b5e6-96231b3b80d8
- this expression is explicitly marked no-signed-zero, or
- no-signed-zero of this expression can be derived from some context.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171922 91177308-0d34-0410-b5e6-96231b3b80d8
method because getContents().size() already covers it. So computeFragmentSize
can use the generic MCEncodedFragment interface when querying both Data and
Relaxable fragments for contents sizes.
No change in functionality
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171903 91177308-0d34-0410-b5e6-96231b3b80d8
Stop using BumpPtrAllocator for HNodes because
they have fields (vector, map) which require HNode
destructors to be run.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171896 91177308-0d34-0410-b5e6-96231b3b80d8
value in the 64 bit .eh_frame section.
It doesn't however allow exception handling to work
yet since it depends on the correct relocation model
being set in the ELF header flags.
Contributer: Jack Carter
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171881 91177308-0d34-0410-b5e6-96231b3b80d8
The current Intel Atom microarchitecture has a feature whereby
when a function returns early then it is slightly faster to execute
a sequence of NOP instructions to wait until the return address is ready,
as opposed to simply stalling on the ret instruction until
the return address is ready.
When compiling for X86 Atom only, this patch will run a pass,
called "X86PadShortFunction" which will add NOP instructions where less
than four cycles elapse between function entry and return.
It includes tests.
This patch has been updated to address Nadav's review comments
- Optimize only at >= O1 and don't do optimization if -Os is set
- Stores MachineBasicBlock* instead of BBNum
- Uses DenseMap instead of std::map
- Fixes placement of braces
Patch by Andy Zhang.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171879 91177308-0d34-0410-b5e6-96231b3b80d8
one file where it is called as a static function. Nuke the declaration
and the definition in lib/CodeGen, along with the include of
SelectionDAG.h from this file.
There is no dependency edge from lib/CodeGen to
lib/CodeGen/SelectionDAG, so it isn't valid for a routine in lib/CodeGen
to reference the DAG. There is a dependency from
lib/CodeGen/SelectionDAG on lib/CodeGen. This breaks one violation of
this layering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171842 91177308-0d34-0410-b5e6-96231b3b80d8
