5 Commits

Author	SHA1	Message	Date
Dale Johannesen	5db1eea91a	Mark all these as needing SSE2. Should fix PPC and ... maybe even Linux. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115291 91177308-0d34-0410-b5e6-96231b3b80d8	2010-10-01 04:17:55 +00:00
Dale Johannesen	0488fb649a	Massive rewrite of MMX: ... The x86_mmx type is used for MMX intrinsics, parameters and return values where these use MMX registers, and is also supported in load, store, and bitcast. Only the above operations generate MMX instructions, and optimizations do not operate on or produce MMX intrinsics. MMX-sized vectors <2 x i32> etc. are lowered to XMM or split into smaller pieces. Optimizations may occur on these forms and the result casted back to x86_mmx, provided the result feeds into a previous existing x86_mmx operation. The point of all this is prevent optimizations from introducing MMX operations, which is unsafe due to the EMMS problem. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115243 91177308-0d34-0410-b5e6-96231b3b80d8	2010-09-30 23:57:10 +00:00
Jakob Stoklund Olesen	700bfada63	Add a -regalloc=default option that chooses a register allocator based on the -O ... optimization level. This only really affects llc for now because both the llvm-gcc and clang front ends override the default register allocator. I intend to remove that code later. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104904 91177308-0d34-0410-b5e6-96231b3b80d8	2010-05-27 23:57:25 +00:00
Dan Gohman	36a0947820	Eliminate more uses of llvm-as and llvm-dis. ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81290 91177308-0d34-0410-b5e6-96231b3b80d8	2009-09-08 23:54:48 +00:00
Dan Gohman	c3c9c486e4	Teach X86FastISel how to handle CCValAssign::BCvt, which is used for ... MMX arguments. This fixes PR4684. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78163 91177308-0d34-0410-b5e6-96231b3b80d8	2009-08-05 05:33:42 +00:00