6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-12-13 20:32:21 +00:00
Code Issues Projects Releases Wiki Activity
71,474 Commits 39 Branches 0 Tags 277 MiB
2227f154eb
Commit Graph

71474 Commits

This Branch
This Branch
All Branches
Author SHA1 Message Date
Chris Lattner
1efe27eb79 distribute content out to the appropriate sections 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128968 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-06 00:45:11 +00:00
Owen Anderson
b48c791515 Reapply r128946 (pseudoization of various instructions), and fix the extra imp-def of CPSR it was adding. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128965 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-05 23:55:28 +00:00
Chandler Carruth
53c5e7b2e7 Make the virtual destructor out-of-line so we have a key function. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128964 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-05 23:54:31 +00:00
Jakob Stoklund Olesen
71d9e65ee7 Sign error 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128963 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-05 23:43:16 +00:00
Jakob Stoklund Olesen
b3dd82670a Don't crash when a value is defined after the last split point. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128962 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-05 23:43:14 +00:00
Jakob Stoklund Olesen
3e22897fa9 Permit blocks to branch directly to a landing pad. 
Treat the landing pad as a normal successor when that happens.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128961 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-05 23:43:11 +00:00
Jim Grosbach
caf767bb02 Remove extraneous 'return'. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128959 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-05 23:39:08 +00:00
Johnny Chen
2c868d1eef Fix a typo in the handling of PKHTB opcode, plus add sanity check for illegal register 
encodings for DisassembleArithMiscFrm().

rdar://problem/9238659


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128958 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-05 23:28:00 +00:00
Chris Lattner
e4dc1966ba finished my pass through all the 2.9 commits, now to make this intelligible 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128955 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-05 23:22:33 +00:00
Chris Lattner
8ae4261d3c mention llvm::ArrayRef, which should be use much more pervasively than 
it already is.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128954 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-05 23:18:20 +00:00
Bob Wilson
61f3cf3bc9 Clean up some code for clarity. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128953 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-05 23:03:25 +00:00
Chandler Carruth
d36d42d4ac Provide an empty virtual destructor to go with the virtual methods in 
this class. Clang was warning on this with -Wnon-virtual-dtor.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128952 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-05 23:03:24 +00:00
Owen Anderson
493cba1b32 Revert r128946 while I figure out why it broke the buildbots. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128951 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-05 23:03:06 +00:00
Johnny Chen
c3281c10c9 A7.3 register encoding 
Qd -> bit[12] == 0
    Qn -> bit[16] == 0
    Qm -> bit[0]  == 0

If one of these bits is 1, the instruction is UNDEFINED.

rdar://problem/9238399
rdar://problem/9238445


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128949 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-05 22:57:07 +00:00
Devang Patel
da19475328 Add support to encode function's template parameters. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128947 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-05 22:52:06 +00:00
Owen Anderson
76634dfabb Give RSBS and RSCS the pseudo treatment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128946 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-05 22:42:54 +00:00
Johnny Chen
5438d76416 ARM disassembler was erroneously accepting an invalid RSC instruction. 
Added checks for regs which should not be 15.

rdar://problem/9237734


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128945 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-05 22:18:07 +00:00
Chris Lattner
1a8b9dd7fb remove postdom frontiers, because it is dead. Forward dom frontiers are 
still used by RegionInfo :(


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128943 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-05 21:57:17 +00:00
NAKAMURA Takumi
c631931f87 docs/ReleaseNotes.html: Please use proper *Heading* elements instead of classified div. 
It would be better to browse without stylesheet. (eg. on ViewVC)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128942 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-05 21:55:14 +00:00
Johnny Chen
c584e317e9 ARM disassembler was erroneously accepting an invalid LSL instruction. 
For register-controlled shifts, we should check that the encoding constraint
Inst{7} = 0 and Inst{4} = 1 is satisfied.

rdar://problem/9237693


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128941 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-05 21:49:44 +00:00
Owen Anderson
7670601313 Fix bugs in the pseuo-ization of ADCS/SBCS pointed out by Jim, as well as doing the expansion earlier (using a custom inserter) to allow for the chance of predicating these instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128940 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-05 21:48:57 +00:00
Chris Lattner
51fbec9021 remove graphprinter support for domfrontier. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128938 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-05 21:43:56 +00:00
Jakob Stoklund Olesen
c5ddb74089 These tests no longer require linear scan because reserved register coalescing is now universal. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128936 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-05 21:40:41 +00:00
Jakob Stoklund Olesen
cfafc54040 Run LiveDebugVariables in RegAllocBasic and RegAllocGreedy. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128935 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-05 21:40:37 +00:00
Chris Lattner
0f310ee3c2 only 7 more weeks to go. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128933 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-05 21:37:08 +00:00
Devang Patel
b4c2bc2543 Refactor. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128929 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-05 21:08:24 +00:00
Jakob Stoklund Olesen
4359e5eccf Document llvm/ADT/IntEqClasses.h in ProgrammersManual.html 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128927 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-05 20:56:08 +00:00
Bob Wilson
bdaa9dc4a4 Add an assertion instead of crashing when the scavenger goes past the end 
of a basic block.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128925 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-05 20:44:15 +00:00
Nick Lewycky
06d2b4223f Fix typos. Adjust some whitespace for style. No functionality change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128924 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-05 20:39:27 +00:00
Johnny Chen
2c2130bc64 The r128085 checkin modified the operand ordering for MRC/MRC2 instructions. 
Modify DisassembleCoprocessor() of ARMDisassemblerCore.cpp to react to the change.

rdar://problem/9236873


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128922 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-05 20:32:23 +00:00
Roman Divacky
2a121b92bb Add support for detection of Intel SandyBridge. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128920 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-05 20:25:36 +00:00
Jakob Stoklund Olesen
57b0fb7850 Fix one more batch of X86 tests to be register allocation dependent. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128919 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-05 20:20:30 +00:00
Jakob Stoklund Olesen
3520019931 When dead code elimination removes all but one use, try to fold the single def into the remaining use. 
Rematerialization can leave single-use loads behind that we might as well fold whenever possible.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128918 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-05 20:20:26 +00:00
Devang Patel
e050f50443 Do not emit empty name. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128914 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-05 20:14:13 +00:00
Johnny Chen
bbc65bbb90 ARM disassembler should flag (rGPRRegClassID, r13|r15) as an error. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128913 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-05 19:42:11 +00:00
Andrew Trick
40f16cf91d Fix a typo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128912 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-05 19:13:11 +00:00
Andrew Trick
ce96902d88 Added *hidden* flags -print-options and -print-all-options so 
developers can see if their driver changed any cl::Option's. The
current implementation isn't perfect but handles most kinds of
options. This is nice to have when decomposing the stages of
compilation and moving between different drivers. It's also a good
sanity check when comparing results produced by different command line
invocations that are expected to produce the comparable results.

Note: This is not an attempt to prolong the life of cl::Option. On the
contrary, it's a placeholder for a feature that must exist when
cl::Option is replaced by a more appropriate framework. A new
framework needs: a central option registry, dynamic name lookup,
non-global containers of option values (e.g. per-module,
per-function), *and* the ability to print options values and their defaults at
any point during compilation.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128910 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-05 18:54:36 +00:00
Johnny Chen
5dc0c50372 LDRD now prints out two dst registers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128909 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-05 18:53:14 +00:00
Johnny Chen
d05a824e1a Fix test-llvm failures. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128906 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-05 18:41:40 +00:00
Andrew Trick
a41af7aeef whitespace 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128905 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-05 18:41:31 +00:00
Shantonu Sen
0da9f13faa An MCDisassembler has the option to not implement 
getEDInfo(), in which case this code would dereference
NULL. EDInst can already handle NULL info, so avoid
the dereference and pass NULL through.

Reviewed by Sean Callanan


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128904 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-05 18:40:45 +00:00
Jim Grosbach
215e4fdbf9 Make second source operand of LDRD pre/post explicit. 
Finish what r128736 started.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128903 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-05 18:40:13 +00:00
Chris Lattner
7a8e6c5fb2 more notes to self. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128902 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-05 18:38:45 +00:00
Johnny Chen
12bb2958c4 Constants with multiple encodings (ARM): 
An alternative syntax is available for a modified immediate constant that permits the programmer to specify
the encoding directly. In this syntax, #<const> is instead written as #<byte>,#<rot>, where:

    <byte> is the numeric value of abcdefgh, in the range 0-255
    <rot> is twice the numeric value of rotation, an even number in the range 0-30.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128897 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-05 18:02:46 +00:00
Johnny Chen
b26d8d7c49 Check for invalid register encodings for UMAAL and friends where: 
if dLo == 15 || dHi == 15 || n == 15 || m == 15 then UNPREDICTABLE;
    if dHi == dLo then UNPREDICTABLE;

rdar://problem/9230202


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128895 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-05 17:43:10 +00:00
Owen Anderson
15b81b51d6 Convert ADCS and SBCS instructions into pseudos that are expanded to the ADC/ABC with the appropriate S-bit input value. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128892 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-05 17:24:25 +00:00
Stuart Hastings
ac42a19217 ARM doesn't support byval yet. XFAIL this test until it does. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128891 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-05 17:16:21 +00:00
Oscar Fuentes
e7510c2e96 Rename LLVMConfig.cmake to LLVM-Config.cmake. The *Config.cmake naming 
scheme is used by the functionality related to find_package.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128889 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-05 17:02:48 +00:00
Jakob Stoklund Olesen
b793bc1cca Ensure all defs referring to a virtual register are marked dead by addRegisterDead(). 
There can be multiple defs for a single virtual register when they are defining
sub-registers.

The missing <dead> flag was stopping the inline spiller from eliminating dead
code after rematerialization.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128888 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-05 16:53:50 +00:00
Rafael Espindola
8439747236 Print visibility info for external variables. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128887 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-05 15:51:32 +00:00