Jim Grosbach
245f5e8e2a
Use ARMPseudoExpand for ARM tail calls.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134719 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-08 18:50:22 +00:00
Jim Grosbach
9ca2a778b6
Shuffle productions around a bit.
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No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134714 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-08 18:26:27 +00:00
Jim Grosbach
4559a7bcfd
Use ARMPseudoExpand for BLr9, BLr9_pred, BXr9, and BXr9_pred.
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TableGen'erated MC lowering pseudo-expansion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134712 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-08 18:15:12 +00:00
Chandler Carruth
549a85138c
Add CMake support for the new TableGen file introduced in r134705.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134707 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-08 17:54:08 +00:00
Jim Grosbach
53e3fc463e
Use TableGen'erated pseudo lowering for ARM.
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Hook up the TableGen lowering for simple pseudo instructions for ARM and
use it for a subset of the many pseudos the backend has as proof of concept.
More conversions to come.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134705 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-08 17:40:42 +00:00
Evan Cheng
ebdeeab812
Eliminate asm parser's dependency on TargetMachine:
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- Each target asm parser now creates its own MCSubtatgetInfo (if needed).
- Changed AssemblerPredicate to take subtarget features which tablegen uses
to generate asm matcher subtarget feature queries. e.g.
"ModeThumb,FeatureThumb2" is translated to
"(Bits & ModeThumb) != 0 && (Bits & FeatureThumb2) != 0".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134678 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-08 01:53:10 +00:00
Akira Hatanaka
0184336195
Raise assertion when MachineOperand has unexpected target flag.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134671 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-08 00:42:35 +00:00
Akira Hatanaka
18dfcb8a28
Make sure variable Kind is assigned a value to suppress warning.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134668 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-08 00:26:25 +00:00
Nick Lewycky
9bf45d0b1a
Let the inline asm 'q' constraint match float, and on 64-bit double too.
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Fixes PR9602!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134665 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-08 00:19:27 +00:00
Eric Christopher
77ed1353bf
Go ahead and emit the barrier on x86-64 even without sse2. The
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processor supports it just fine.
Fixes PR9675 and rdar://9740801
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134664 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-08 00:04:56 +00:00
Akira Hatanaka
794bf17cbe
Lower MachineInstr to MC Inst and print to .s files.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134661 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-07 23:56:50 +00:00
Eric Christopher
d8cca66bb4
Handle fpcr register.
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Part of PR10299 and rdar://9740322
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134653 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-07 22:54:12 +00:00
Eric Christopher
31b5f00c4e
Add support for the X86 'l' constraint.
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Fixes PR10149 and rdar://9738585
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134648 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-07 22:29:07 +00:00
Akira Hatanaka
78d62b2c7f
Remove unnecessary newline.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134645 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-07 22:06:18 +00:00
Evan Cheng
18fb1d35db
Add Mode64Bit feature and sink it down to MC layer.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134641 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-07 21:06:52 +00:00
Bill Wendling
4ae970b393
Move a function out-of-line.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134640 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-07 21:05:13 +00:00
Akira Hatanaka
03236be44a
Rather than having printMemOperand change the way memory operands are printed
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based on a modifier, split it into two functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134637 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-07 20:54:20 +00:00
Akira Hatanaka
17a2f8e551
Define class MipsMCInstLower.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134633 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-07 20:24:54 +00:00
Akira Hatanaka
aa08ea0530
Change visibility of MipsAsmPrinter.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134630 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-07 20:10:52 +00:00
Akira Hatanaka
2091a0d8d2
Define class MipsMCSymbolRefExpr.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134629 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-07 19:27:22 +00:00
Akira Hatanaka
4d1abf1a38
Simplify MipsRegisterInfo::eliminateFrameIndex.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134628 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-07 19:13:09 +00:00
Evan Cheng
4761a8d654
Rewrite comment in English.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134627 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-07 19:09:06 +00:00
Evan Cheng
963b03c1a9
Rename attribute 'thumb' to a more descriptive 'thumb-mode'.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134626 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-07 19:05:12 +00:00
Akira Hatanaka
d3ac47f805
Reverse order of operands of address operand mem so that the base operand comes
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before the offset. This change will enable simplification of function
MipsRegisterInfo::eliminateFrameIndex.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134625 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-07 18:57:00 +00:00
Akira Hatanaka
e280519ba6
Add missing return statement.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134622 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-07 18:27:36 +00:00
Oscar Fuentes
a8504111f6
Update CMake library dependencies
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134616 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-07 16:33:00 +00:00
Douglas Gregor
7f358da70f
Fix CMake build
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134614 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-07 15:59:22 +00:00
Cameron Zwarich
375db7f39a
The VMLA instruction and its friends are not actually fused; they're plain old
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multiply-accumulate instructions with separate rounding steps.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134609 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-07 08:28:52 +00:00
Evan Cheng
db068738e8
Sink feature IsThumb into MC layer.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134608 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-07 08:26:46 +00:00
Evan Cheng
0ddff1b535
Compute feature bits at time of MCSubtargetInfo initialization.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134606 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-07 07:07:08 +00:00
Bill Wendling
b99e412650
Use ArrayRef instead of a std::vector&.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134595 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-07 04:42:01 +00:00
Evan Cheng
39dfb0ff84
Change some ARM subtarget features to be single bit yes/no in order to sink them down to MC layer. Also fix tests.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134590 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-07 03:55:05 +00:00
Bill Wendling
6a6b8c3e96
Add a target hook to encode the compact unwind information.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134577 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-07 00:54:13 +00:00
Evan Cheng
94ca42ff04
Factor ARM triple parsing out of ARMSubtarget. Another step towards making ARM subtarget info available to MC.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134569 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-07 00:08:19 +00:00
Evan Cheng
78a9f138ae
Add ARM MC registry routines.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134547 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-06 22:02:34 +00:00
Evan Cheng
ed5e355214
Rename files for consistency.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134546 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-06 22:01:53 +00:00
Jim Grosbach
d1689ae4b1
Mark ARM pseudo-instructions as isPseudo.
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This allows us to remove the (bogus and unneeded) encoding information from
the pseudo-instruction class definitions. All of the pseudos that haven't
been converted yet and still need encoding information instance from the normal
instruction classes and explicitly set isCodeGenOnly, and so are distinct
from this change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134540 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-06 21:35:46 +00:00
Jim Grosbach
d378b32382
Remove un-used encoding info from Pseudo MLAv5.
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Pseudo-instructions don't have encoding information, as they're lowered
to real instructions by the time we're doing binary encoding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134533 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-06 20:57:35 +00:00
Bill Wendling
486dd90696
Constify getCompactUnwindRegNum.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134527 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-06 20:33:48 +00:00
Evan Cheng
b262799d49
createMCInstPrinter doesn't need TargetMachine anymore.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134525 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-06 19:45:42 +00:00
Kevin Enderby
d521f2d2f1
Changed the X86 PUSH64i8 record to use the i64i8imm ParserMatchClass so that a
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push with a small constant produces a 2-byte push.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134501 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-06 17:23:46 +00:00
Evan Cheng
68ae5b4bea
Remove the AsmWriterEmitter (unused) feature that rely on TargetSubtargetInfo.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134457 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-06 02:02:33 +00:00
Eli Friedman
af45b3d8cb
Add assembler/disassembler support for non-AVX pclmulqdq. While I'm here, use proper aliases for the pclmullqlqdq and friends. PR10269.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134424 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-05 18:21:20 +00:00
Jim Grosbach
bc20e4f2dc
ARM estimateStackSize() needs to account for simplified call frames.
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If the function allocates reserved stack space for callee argument frames,
estimateStackSize() needs to account for that, as it doesn't show up as
ordinary frame objects. Otherwise, a callee with a large argument list will
throw off the calculations for whether to allocate an emergency spill slot
and we get assert() failures in the register scavenger.
rdar://9715469
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134415 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-05 16:05:50 +00:00
Roman Divacky
cbb11869c4
Remove accidentaly left node from previous iteration of the patch.
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Noticed by Benjamin Kramer!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134376 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-04 15:42:45 +00:00
Roman Divacky
b272332e61
Make the i64 and f64 be 64bit ABI aligned in the target description.
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This is what both the ABI and clang says.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134367 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-03 16:24:07 +00:00
Duncan Sands
d6b98e8bd8
Remove unused array.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134323 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-02 16:36:24 +00:00
Jakob Stoklund Olesen
0d3d95662f
Consistent diagnostic capitalization and redundant context elimination.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134311 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-02 07:23:40 +00:00
Jakob Stoklund Olesen
d519de0827
Include a source location when complaining about bad inline assembly.
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Add a MI->emitError() method that the backend can use to report errors
related to inline assembly. Call it from X86FloatingPoint.cpp when the
constraints are wrong.
This enables proper clang diagnostics from the backend:
$ clang -c pr30848.c
pr30848.c:5:12: error: Inline asm output regs must be last on the x87 stack
__asm__ ("" : "=u" (d)); /* { dg-error "output regs" } */
^
1 error generated.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134307 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-02 03:53:34 +00:00
Eric Christopher
e3997d40de
TargetConstant immediates won't be placed into registers so tighten
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up the valid constant check earlier.
rdar://9692967
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134286 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-01 23:04:38 +00:00