Anton Korobeynikov
2625de35ed
Implement variable-width shifts.
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No testcase yet - it seems we're exposing generic codegen bugs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91221 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-12 18:55:37 +00:00
Evan Cheng
04ab19cb14
Add comment about potential partial register stall.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91220 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-12 18:55:26 +00:00
Evan Cheng
15b0d97068
Fix an obvious bug. No test case since LEA16r is not being used.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91219 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-12 18:51:56 +00:00
Jim Grosbach
e801dc4a7b
Framework for atomic binary operations. The emitter for the pseudo instructions
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just issues an error for the moment. The front end won't yet generate these
intrinsics for ARM, so this is behind the scenes until complete.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91200 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-12 01:40:06 +00:00
Anton Korobeynikov
8d1ffbd1ad
Lower setcc branchless, if this is profitable.
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Based on the patch by Brian Lucas!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91175 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-11 23:01:29 +00:00
Dan Gohman
87862e77bb
Implement vector widening, splitting, and scalarizing for SIGN_EXTEND_INREG.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91158 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-11 21:31:27 +00:00
Jim Grosbach
c8f9e4fdc5
memory barrier instructions by definition have side effects. This prevents the post-RA scheduler from moving them around.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91150 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-11 20:29:53 +00:00
Anton Korobeynikov
817a46454a
Honour setHasCalls() set from isel.
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This is used in some weird cases like general dynamic TLS model.
This fixes PR5723
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91144 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-11 19:39:55 +00:00
Johnny Chen
0291d7ed09
Store Register Exclusive should leave the source register Inst{3-0} unspecified.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91143 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-11 19:37:26 +00:00
Jim Grosbach
66869104dd
Update properties.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91140 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-11 18:52:41 +00:00
Evan Cheng
656e51454a
Add support to 3-addressify 16-bit instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91104 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-11 06:01:48 +00:00
Jim Grosbach
5278eb802f
Rough first pass at compare_and_swap atomic builtins for ARM mode. Work in progress.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91090 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-11 01:42:04 +00:00
Jim Grosbach
cbd77d2cb1
Add instruction encoding for DMB/DSB
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91053 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-10 18:35:32 +00:00
Jim Grosbach
3728e96a6c
Add memory barrier intrinsic support for ARM. Moving towards adding the atomic operations intrinsics.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91003 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-10 00:11:09 +00:00
Evan Cheng
c363094e04
Optimize splat of a scalar load into a shuffle of a vector load when it's legal. e.g.
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vector_shuffle (scalar_to_vector (i32 load (ptr + 4))), undef, <0, 0, 0, 0>
=>
vector_shuffle (v4i32 load ptr), undef, <1, 1, 1, 1>
iff ptr is 16-byte aligned (or can be made into 16-byte aligned).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90984 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-09 21:00:30 +00:00
Evan Cheng
7bd6478cd6
Teach InferPtrAlignment to infer GV+cst alignment and use it to simplify x86 isl lowering code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90925 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-09 01:53:58 +00:00
Evan Cheng
64fa4a9584
Move isConsecutiveLoad to SelectionDAG. It's not target dependent and it's primary used by selectdag passes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90922 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-09 01:36:00 +00:00
Evan Cheng
d831cda3e7
- Support inline asm 'w' constraint for 128-bit vector types.
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- Also support the 'q' NEON registers asm code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90894 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-08 23:06:22 +00:00
Anton Korobeynikov
9aa1ec87b0
Reduce (cmp 0, and_su (foo, bar)) into (bit foo, bar). This saves extra instruction. Patch inspired by Brian Lucas!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90819 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-08 01:03:04 +00:00
Dan Gohman
d84ea47b89
Don't enable the post-RA scheduler on x86 except at -O3. In its
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current form, it is too expensive in compile time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90781 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-07 19:04:31 +00:00
Anton Korobeynikov
6bfcba7e13
Some pretty-printing
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90742 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-07 02:28:41 +00:00
Anton Korobeynikov
06ccca5f70
Add lowering of returnaddr and frameaddr intrinsics. Shamelessly stolen from x86 :)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90740 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-07 02:28:10 +00:00
Anton Korobeynikov
e662f7a8b2
Initial codegen support for MSP430 ISRs
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90739 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-07 02:27:53 +00:00
Anton Korobeynikov
b2de1ea29b
Add ability to select hw multiplier mode and select appropriate libcalls.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90737 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-07 02:27:08 +00:00
Anton Korobeynikov
7cca606aaa
Dynamic stack realignment use of sp register as source/dest register
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in "bic sp, sp, #15 " leads to unpredicatble behaviour in Thumb2 mode.
Emit the following code instead:
mov r4, sp
bic r4, r4, #15
mov sp, r4
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90724 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-06 22:39:50 +00:00
Bill Wendling
740266269b
Calling InvalidateEntry during the refinement was breaking the bootstrap.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90656 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-05 07:59:04 +00:00
Bill Wendling
32bc2362a1
Final cleanups:
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- Privatize a typedef.
- Call the InvalidateEntry when refining a type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90655 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-05 07:46:49 +00:00
Bill Wendling
688da28687
Inline methods which are called only once.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90640 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-05 01:46:01 +00:00
Bill Wendling
5681689795
Refactor some code. No functionality change.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90639 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-05 01:43:33 +00:00
Dan Gohman
864e2efce2
Remove the target hook TargetInstrInfo::BlockHasNoFallThrough in favor of
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MachineBasicBlock::canFallThrough(), which is target-independent and more
thorough.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90634 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-05 00:44:40 +00:00
David Greene
adbc23cae1
Remove an unneeded include.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90625 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-04 23:55:07 +00:00
David Greene
29dbf50b18
Have hasLoad/StoreFrom/ToStackSlot return the relevant MachineMemOperand.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90608 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-04 22:38:46 +00:00
Bill Wendling
1500c4f49a
Some code cleanup. No functionality change.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90588 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-04 21:03:02 +00:00
Jim Grosbach
4dc4a61c0c
remove out of date FIXME.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90490 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-03 21:55:01 +00:00
Chris Lattner
89742c2c3f
expand note.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90429 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-03 07:43:46 +00:00
Chris Lattner
053321731c
add a note
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90428 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-03 07:41:54 +00:00
Chris Lattner
56856b1f46
fix a build problem with VC++, PR5664, patch by Alp Toker!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90419 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-03 06:58:32 +00:00
Bob Wilson
324f4f1633
Recognize canonical forms of vector shuffles where the same vector is used for
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both source operands. In the canonical form, the 2nd operand is changed to an
undef and the shuffle mask is adjusted to only reference elements from the 1st
operand. Radar 7434842.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90417 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-03 06:40:55 +00:00
Bill Wendling
cb06403145
Revert r90371. It was causing build failures.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90383 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-03 01:54:07 +00:00
Bill Wendling
b8e675c3c1
Further improvements: refactoring code that does the same thing into one
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function, converting "dyn_cast" to "cast", asserting the correct things, and
other general cleanups.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90371 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-03 01:15:46 +00:00
Chris Lattner
bf108bdee5
yay for case insensitive file systems (?)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90370 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-03 01:10:05 +00:00
Chris Lattner
35e86af8e5
remove some dead std::ostream using code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90366 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-03 00:55:04 +00:00
Chris Lattner
7896c9f436
improve portability to avoid conflicting with std::next in c++'0x.
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Patch by Howard Hinnant!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90365 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-03 00:50:42 +00:00
Bill Wendling
dd5eb02304
This initial code is meant to convert TargetData to use an AbstractTypesUser so
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that it doesn't have dangling pointers when abstract types are resolved. This
modifies it somewhat to address comments: making the "StructLayoutMap" an
anonymous structure, calling "removeAbstractTypeUser" when appropriate, and
adding asserts where helpful.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90362 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-03 00:17:12 +00:00
Jim Grosbach
e27d205d5d
Factor the stack alignment calculations out into a target independent pass.
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No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90336 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-02 19:30:24 +00:00
Jim Grosbach
d122874996
Thumb1 exception handling setjmp
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90246 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-01 18:10:36 +00:00
Johnny Chen
b731e87649
For VLDM/VSTM (Advanced SIMD), set encoding bits Inst{11-8} to 0b1011.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90243 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-01 17:37:06 +00:00
Johnny Chen
208d76cad9
For VMOV (immediate), make some of the encoding bits (cmode and op) unspecified.
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For VMOVv*i[16,32], op bit is don't care, and some cmode bits vary depending on
the immediate values.
Ref: Table A7-15 Modified immediate values for Advanced SIMD instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90173 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-01 00:02:02 +00:00
Dan Gohman
39a1fab856
Minor whitespace fixes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90166 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-30 23:33:53 +00:00
Dan Gohman
22f6526081
Fix a minor inconsistency.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90165 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-30 23:33:37 +00:00