Commit Graph

4583 Commits

Author SHA1 Message Date
Devang Patel
e130d78ee1 Speculatively revert r112207.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112216 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-26 20:33:42 +00:00
Devang Patel
8f09beacb1 80 col.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112215 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-26 20:32:32 +00:00
Devang Patel
f2ec7ae279 Update DanglingDebugInfo so that it can be used to track llvm.dbg.declare also.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112213 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-26 20:06:46 +00:00
Devang Patel
9d0796a0e0 Donot forget to resolve dangling debug info in a case where virtual register, used for a value, is initialized after a dbg intrinsic is seen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112207 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-26 18:36:14 +00:00
Chris Lattner
341fa09a3c Add a hackaround for PR7993 which is causing failures on x86 builders that lack sse2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112175 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-26 06:57:07 +00:00
Chris Lattner
8306968c14 implement SplitVecOp_CONCAT_VECTORS, fixing the included testcase with SSE1.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112171 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-26 05:51:22 +00:00
Chris Lattner
6dabd9dba0 zap dead code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112155 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-26 02:57:35 +00:00
Chris Lattner
aafe626c7f remove some llvmcontext arguments that are now dead post-refactoring.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112104 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-25 23:00:45 +00:00
Chris Lattner
e6f7c267df Change handling of illegal vector types to widen when possible instead of
expanding: e.g. <2 x float> -> <4 x float> instead of -> 2 floats.  This
affects two places in the code: handling cross block values and handling
function return and arguments.  Since vectors are already widened by 
legalizetypes, this gives us much better code and unblocks x86-64 abi
and SPU abi work.

For example, this (which is a silly example of a cross-block value):
define <4 x float> @test2(<4 x float> %A) nounwind {
 %B = shufflevector <4 x float> %A, <4 x float> undef, <2 x i32> <i32 0, i32 1>
 %C = fadd <2 x float> %B, %B
  br label %BB
BB:
 %D = fadd <2 x float> %C, %C
 %E = shufflevector <2 x float> %D, <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
 ret <4 x float> %E
}

Now compiles into:

_test2:                                 ## @test2
## BB#0:
 addps %xmm0, %xmm0
 addps %xmm0, %xmm0
 ret

previously it compiled into:

_test2:                                 ## @test2
## BB#0:
 addps %xmm0, %xmm0
 pshufd $1, %xmm0, %xmm1
                                        ## kill: XMM0<def> XMM0<kill> XMM0<def>
 insertps $0, %xmm0, %xmm0
 insertps $16, %xmm1, %xmm0
 addps %xmm0, %xmm0
 ret

This implements rdar://8230384



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112101 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-25 22:49:25 +00:00
Devang Patel
ab43add695 Fix comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112086 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-25 20:41:24 +00:00
Devang Patel
78a06e50b7 Remove dead argument.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112085 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-25 20:39:26 +00:00
Chris Lattner
3ac1884509 split the vector case of getCopyFromParts out to its own function,
no functionality change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111994 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-24 23:20:40 +00:00
Chris Lattner
a13b860f4d split the vector case out of getCopyToParts into its own function. No
functionality change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111990 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-24 23:10:06 +00:00
Chris Lattner
549fa267ef tidy up, reduce indentation
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111982 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-24 22:43:11 +00:00
Chandler Carruth
54f6163042 Fix some GCC warnings by providing a virtual destructor in the base of a class
hierarchy with virtual methods and using llvm_unreachable to properly indicate
unreachable states which would otherwise leave variables uninitialized.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111803 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-23 08:25:07 +00:00
Bob Wilson
63241f79e6 If the target says that an extending load is not legal, regardless of whether
it involves specific floating-point types, legalize should expand an
extending load to a non-extending load followed by a separate extend operation.
For example, we currently expand SEXTLOAD to EXTLOAD+SIGN_EXTEND_INREG (and
assert that EXTLOAD should always be supported).  Now we can expand that to
LOAD+SIGN_EXTEND.  This is needed to allow vector SIGN_EXTEND and ZERO_EXTEND
to be used for NEON.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111586 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-19 23:52:39 +00:00
Dale Johannesen
6cf64a631a Make fast scheduler handle asm clobbers correctly.
PR 7882.  Follows suggestion by Amaury Pouly, thanks.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111306 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-17 22:17:24 +00:00
Eric Christopher
44a2c3476b Fix typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111223 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-17 01:30:33 +00:00
Evan Cheng
c120af4567 Add missing null check reported by Amaury Pouly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110649 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-10 02:39:45 +00:00
Owen Anderson
90c579de5a Reapply r110396, with fixes to appease the Linux buildbot gods.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110460 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-06 18:33:48 +00:00
Owen Anderson
1f74590e9d Revert r110396 to fix buildbots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110410 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-06 00:23:35 +00:00
Owen Anderson
9ccaf53ada Don't use PassInfo* as a type identifier for passes. Instead, use the address of the static
ID member as the sole unique type identifier.  Clean up APIs related to this change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110396 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-05 23:42:04 +00:00
Dan Gohman
d98af0a5b8 Eliminate unnecessary empty string literals.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110183 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-04 01:39:08 +00:00
Oscar Fuentes
ee56c42168 Prefix next' iterator operation with llvm::'.
Fixes potential ambiguity problems on VS 2010.

Patch by nobled!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110029 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-02 06:00:15 +00:00
Eli Friedman
1d17d199a4 PR7586: Make sure we don't claim that unknown bits are actually known in the
ISD::AND case of TargetLowering::SimplifyDemandedBits.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110019 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-02 04:42:25 +00:00
Eli Friedman
ad78a88711 Fix for bug reported by Evzen Muller on llvm-commits: make sure to correctly
check the range of the constant when optimizing a comparison between a
constant and a sign_extend_inreg node.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109854 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-30 06:44:31 +00:00
Nate Begeman
e0efc216eb Fix a crash in the dag combiner caused by ConstantFoldBIT_CONVERTofBUILD_VECTOR calling itself
recursively and returning a SCALAR_TO_VECTOR node, but assuming the input was always a BUILD_VECTOR.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109519 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-27 18:02:18 +00:00
Bill Wendling
dfc2c51d12 It's better to have the arrays, which would trigger the creation of stack
protectors, to be near the stack protectors on the stack. Accomplish this by
tagging the stack object with a predicate that indicates that it would trigger
this. In the prolog-epilog inserter, assign these objects to the stack after the
stack protector but before the other objects.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109481 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-27 01:55:19 +00:00
Evan Cheng
e0e925efb3 The "excess register pressure" returned by HighRegPressure() is not accurate enough to factor into scheduling priority. Eliminate it and add early exits to speed up scheduling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109449 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-26 21:49:07 +00:00
Dan Gohman
7da5d3fc65 Handle Values with no value in getCopyFromRegs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109415 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-26 18:15:41 +00:00
Duncan Sands
b3893b193b Pacify gcc-4.5 which wrongly thinks that RExcess (passed as the Excess parameter)
may be used uninitialized in the callers of HighRegPressure.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109393 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-26 07:54:17 +00:00
Evan Cheng
e28ed16d25 Add comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109383 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-25 18:59:43 +00:00
Bob Wilson
3f92f73970 Fix crashes when scheduling a CopyToReg node -- getMachineOpcode asserts on
those.  Radar 8231572.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109367 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-25 05:34:27 +00:00
Evan Cheng
70017e44cd Add an ILP scheduler. This is a register pressure aware scheduler that's
appropriate for targets without detailed instruction iterineries.
The scheduler schedules for increased instruction level parallelism in
low register pressure situation; it schedules to reduce register pressure
when the register pressure becomes high.

On x86_64, this is a win for all tests in CFP2000. It also sped up 256.bzip2
by 16%.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109300 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-24 00:39:05 +00:00
Evan Cheng
3144687df7 - Allow target to specify when is register pressure "too high". In most cases,
it's too late to start backing off aggressive latency scheduling when most
  of the registers are in use so the threshold should be a bit tighter.
- Correctly handle live out's and extract_subreg etc.
- Enable register pressure aware scheduling by default for hybrid scheduler.
  For ARM, this is almost always a win on # of instructions. It's runtime
  neutral for most of the tests. But for some kernels with high register
  pressure it can be a huge win. e.g. 464.h264ref reduced number of spills by
  54 and sped up by 20%.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109279 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-23 22:39:59 +00:00
Dan Gohman
cd20c6fb18 Use the proper type for shift counts. This fixes a bootstrap error.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109265 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-23 21:08:12 +00:00
Dan Gohman
a4f4d699ec DAGCombine (shl (anyext x, c)) to (anyext (shl x, c)) if the high bits
are not demanded. This often allows the anyext to be folded away.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109242 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-23 18:03:30 +00:00
Dan Gohman
7c98283f0e Make SDNode::dump() print a newline at the end.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109234 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-23 16:37:47 +00:00
Eric Christopher
54e1791e4b 80-col.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109205 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-23 01:05:59 +00:00
Gabor Greif
481c4c0734 keep in 80 cols
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109122 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-22 17:18:03 +00:00
Gabor Greif
96f1d8ebdd mass elimination of reliance on automatic iterator dereferencing
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109103 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-22 13:36:47 +00:00
Evan Cheng
89ba74d117 Re-apply r109079 with fix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109083 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-22 06:24:48 +00:00
Owen Anderson
8b9177aee2 Revert r109079, which broke a lot of CodeGen tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109082 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-22 06:01:28 +00:00
Evan Cheng
a4081238aa Initialize RegLimit only when register pressure is being tracked.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109079 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-22 05:18:41 +00:00
Evan Cheng
4a863e2c75 More register pressure aware scheduling work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109064 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-21 23:53:58 +00:00
Evan Cheng
4f6b4674be Teach bottom up pre-ra scheduler to track register pressure. Work in progress.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108991 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-21 06:09:07 +00:00
Dan Gohman
c6e59b71f5 After a custom inserter, in a block which has constant instructions,
update the current basic block in addition to the current insert
position, so that they remain consistent. This fixes rdar://8204072.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108765 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-19 22:48:56 +00:00
Evan Cheng
d70f57b254 ARM has to provide its own TargetLowering::findRepresentativeClass because its scalar floating point registers alias its vector registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108761 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-19 22:15:08 +00:00
Evan Cheng
46dcb57e18 Teach computeRegisterProperties() to compute "representative" register class for legal value types. A "representative" register class is the largest legal super-reg register class for a value type. e.g. On i386, GR32 is the rep register class for i8 / i16 / i32; on x86_64 it would be GR64.
This property will be used by the register pressure tracking instruction scheduler.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108735 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-19 18:47:01 +00:00
Owen Anderson
54026c0f1b Remove r108639 now that it is handled by InstCombine instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108688 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-19 08:10:24 +00:00