Tom Stellard
81c6c9690a
R600/SI: Enable selecting SALU inside branches
...
We can do this now that the FixSGPRLiveRanges pass is working.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218353 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-24 01:33:28 +00:00
Matt Arsenault
f1b16047b7
R600/SI: Prefer selecting more e64 instruction forms.
...
Add some more tests to make sure better operand
choices are still made. Leave some cases that seem
to have no reason to ever be e64 alone.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217789 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-15 17:15:02 +00:00
Tom Stellard
13f4476c55
R600/SI: Add a ComplexPattern for selecting MUBUF _OFFSET variant
...
This saves us from having to copy a 64-bit 0 value into VGPRs for
BUFFER_* instruction which only have a 12-bit immediate offset.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215399 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-11 22:18:17 +00:00
Tom Stellard
94dfb8818d
R600/SI: Update MUBUF assembly string to match AMD proprietary compiler
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214866 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-05 14:48:12 +00:00
Tom Stellard
9787e8c76b
R600/SI: Add instruction shrinking pass
...
This pass converts 64-bit instructions to 32-bit when possible.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213561 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-21 16:55:33 +00:00
Tom Stellard
c0bf939e80
R600/SI: Add patterns for ctpop inside a branch
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211378 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-20 17:06:11 +00:00
Matt Arsenault
1f4772305a
R600: Use BCNT_INT for evergreen
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210569 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-10 19:18:28 +00:00
Matt Arsenault
ee9772d9dd
R600/SI: Use bcnt instruction for ctpop
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210567 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-10 19:18:21 +00:00
