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29582d1223
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4077 Commits

Author SHA1 Message Date
Dan Gohman
29582d1223 Revert r66004 for now; it's causing a variety of test failures. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66008 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-03-04 03:54:19 +00:00
Dan Gohman
12bbc52aa7 Teach the x86 backend to eliminate "test" instructions by using the EFLAGS 
result from add, sub, inc, and dec instructions in simple cases.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66004 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-03-04 02:33:24 +00:00
Evan Cheng
599a6a88ce Fix PR3701. 1. X86 target renamed eflags register to flags. This matches what llvm-gcc generates so codegen knows flags register is being clobbered by inline asm. 2. BURR scheduler should also check if inline asm nodes can clobber "live" physical registers. Previously it was only checking target nodes with implicit defs. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65996 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-03-04 01:41:49 +00:00
Dan Gohman
09a2609e20 Add '(implicit EFLAGS)' for AND, OR, XOR, NEG, INC, and DEC 
instructions. These aren't used yet.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65965 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-03-03 19:53:46 +00:00
Dan Gohman
0f8b53f19d Fix a bunch of Doxygen syntax issues. Escape special characters, 
and put @file directives on their own comment line.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65920 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-03-03 02:55:14 +00:00
Mon P Wang
9feb5dd568 Added another darwin subtarget 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65662 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-28 00:25:30 +00:00
Rafael Espindola
9a58023c6c Refactor TLS code and add some tests. The tests and expected results are: 
pic |  declaration | linkage  | visibility |

!pic |  declaration | external | default    | tls1.ll     tls2.ll     | local exec
 pic |  declaration | external | default    | tls1-pic.ll tls2-pic.ll | general dynamic
!pic | !declaration | external | default    | tls3.ll     tls4.ll     | initial exec
 pic | !declaration | external | default    | tls3-pic.ll tls4-pic.ll | general dynamic

!pic |  declaration | external | hidden     | tls7.ll     tls8.ll     | local exec
 pic |  declaration | external | hidden     | X                       | local dynamic
!pic | !declaration | external | hidden     | tls9.ll     tls10.ll    | local exec
 pic | !declaration | external | hidden     | X                       | local dynamic

!pic |  declaration | internal | default    | tls5.ll     tls6.ll     | local exec
 pic |  declaration | internal | default    | X                       | local dynamic

The ones marked with an X have not been implemented since local dynamic is not implemented.




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65632 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-27 13:37:18 +00:00
Evan Cheng
236aa8a503 ADDS{D|S}rr_Int and MULS{D|S}rr_Int are not commutable. The users of these intrinsics expect the high bits will not be modified. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65499 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-26 03:12:02 +00:00
Evan Cheng
a87008d90b Revert BuildVectorSDNode related patches: 65426, 65427, and 65296. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65482 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-25 22:49:59 +00:00
Bill Wendling
57f0db833d Overhaul my earlier submission due to feedback. It's a large patch, but most of 
them are generic changes.

- Use the "fast" flag that's already being passed into the asm printers instead
  of shoving it into the DwarfWriter.

- Instead of calling "MI->getParent()->getParent()" for every MI, set the
  machine function when calling "runOnMachineFunction" in the asm printers.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65379 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-24 08:30:20 +00:00
Dan Gohman
e9865945ad Fast-isel can't do TLS yet, so it should fall back to SDISel 
if it sees TLS addresses.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65341 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-23 22:03:08 +00:00
Evan Cheng
242b38bae5 Only v1i16 (i.e. _m64) is returned via RAX / RDX. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65313 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-23 09:03:22 +00:00
Nate Begeman
b9a47b824f Generate better code for v8i16 shuffles on SSE2 
Generate better code for v16i8 shuffles on SSE2 (avoids stack)
Generate pshufb for v8i16 and v16i8 shuffles on SSSE3 where it is fewer uops.
Document the shuffle matching logic and add some FIXMEs for later further
  cleanups.
New tests that test the above.

Examples:

New:
_shuf2:
	pextrw	$7, %xmm0, %eax
	punpcklqdq	%xmm1, %xmm0
	pshuflw	$128, %xmm0, %xmm0
	pinsrw	$2, %eax, %xmm0

Old:
_shuf2:
	pextrw	$2, %xmm0, %eax
	pextrw	$7, %xmm0, %ecx
	pinsrw	$2, %ecx, %xmm0
	pinsrw	$3, %eax, %xmm0
	movd	%xmm1, %eax
	pinsrw	$4, %eax, %xmm0
	ret

=========

New:
_shuf4:
	punpcklqdq	%xmm1, %xmm0
	pshufb	LCPI1_0, %xmm0

Old:
_shuf4:
	pextrw	$3, %xmm0, %eax
	movsd	%xmm1, %xmm0
	pextrw	$3, %xmm1, %ecx
	pinsrw	$4, %ecx, %xmm0
	pinsrw	$5, %eax, %xmm0

========

New:
_shuf1:
	pushl	%ebx
	pushl	%edi
	pushl	%esi
	pextrw	$1, %xmm0, %eax
	rolw	$8, %ax
	movd	%xmm0, %ecx
	rolw	$8, %cx
	pextrw	$5, %xmm0, %edx
	pextrw	$4, %xmm0, %esi
	pextrw	$3, %xmm0, %edi
	pextrw	$2, %xmm0, %ebx
	movaps	%xmm0, %xmm1
	pinsrw	$0, %ecx, %xmm1
	pinsrw	$1, %eax, %xmm1
	rolw	$8, %bx
	pinsrw	$2, %ebx, %xmm1
	rolw	$8, %di
	pinsrw	$3, %edi, %xmm1
	rolw	$8, %si
	pinsrw	$4, %esi, %xmm1
	rolw	$8, %dx
	pinsrw	$5, %edx, %xmm1
	pextrw	$7, %xmm0, %eax
	rolw	$8, %ax
	movaps	%xmm1, %xmm0
	pinsrw	$7, %eax, %xmm0
	popl	%esi
	popl	%edi
	popl	%ebx
	ret

Old:
_shuf1:
	subl	$252, %esp
	movaps	%xmm0, (%esp)
	movaps	%xmm0, 16(%esp)
	movaps	%xmm0, 32(%esp)
	movaps	%xmm0, 48(%esp)
	movaps	%xmm0, 64(%esp)
	movaps	%xmm0, 80(%esp)
	movaps	%xmm0, 96(%esp)
	movaps	%xmm0, 224(%esp)
	movaps	%xmm0, 208(%esp)
	movaps	%xmm0, 192(%esp)
	movaps	%xmm0, 176(%esp)
	movaps	%xmm0, 160(%esp)
	movaps	%xmm0, 144(%esp)
	movaps	%xmm0, 128(%esp)
	movaps	%xmm0, 112(%esp)
	movzbl	14(%esp), %eax
	movd	%eax, %xmm1
	movzbl	22(%esp), %eax
	movd	%eax, %xmm2
	punpcklbw	%xmm1, %xmm2
	movzbl	42(%esp), %eax
	movd	%eax, %xmm1
	movzbl	50(%esp), %eax
	movd	%eax, %xmm3
	punpcklbw	%xmm1, %xmm3
	punpcklbw	%xmm2, %xmm3
	movzbl	77(%esp), %eax
	movd	%eax, %xmm1
	movzbl	84(%esp), %eax
	movd	%eax, %xmm2
	punpcklbw	%xmm1, %xmm2
	movzbl	104(%esp), %eax
	movd	%eax, %xmm1
	punpcklbw	%xmm1, %xmm0
	punpcklbw	%xmm2, %xmm0
	movaps	%xmm0, %xmm1
	punpcklbw	%xmm3, %xmm1
	movzbl	127(%esp), %eax
	movd	%eax, %xmm0
	movzbl	135(%esp), %eax
	movd	%eax, %xmm2
	punpcklbw	%xmm0, %xmm2
	movzbl	155(%esp), %eax
	movd	%eax, %xmm0
	movzbl	163(%esp), %eax
	movd	%eax, %xmm3
	punpcklbw	%xmm0, %xmm3
	punpcklbw	%xmm2, %xmm3
	movzbl	188(%esp), %eax
	movd	%eax, %xmm0
	movzbl	197(%esp), %eax
	movd	%eax, %xmm2
	punpcklbw	%xmm0, %xmm2
	movzbl	217(%esp), %eax
	movd	%eax, %xmm4
	movzbl	225(%esp), %eax
	movd	%eax, %xmm0
	punpcklbw	%xmm4, %xmm0
	punpcklbw	%xmm2, %xmm0
	punpcklbw	%xmm3, %xmm0
	punpcklbw	%xmm1, %xmm0
	addl	$252, %esp
	ret



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65311 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-23 08:49:38 +00:00
Scott Michel
4214a5531c Introduce the BuildVectorSDNode class that encapsulates the ISD::BUILD_VECTOR 
instruction. The class also consolidates the code for detecting constant
splats that's shared across PowerPC and the CellSPU backends (and might be
useful for other backends.) Also introduces SelectionDAG::getBUID_VECTOR() for
generating new BUILD_VECTOR nodes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65296 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-22 23:36:09 +00:00
Evan Cheng
779aee1fea Add a note. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65275 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-22 08:13:45 +00:00
Evan Cheng
6140a8b057 Be bug compatible with gcc by returning MMX values in RAX. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65274 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-22 08:05:12 +00:00
Evan Cheng
c94ebef1b1 Do not consider MMX_MOVD64rr a move instructions. The source register is in GR32, the destination is VR64. They are not compatible. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65273 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-22 08:04:23 +00:00
Anton Korobeynikov
b5bd026a75 Drop bunch of half-working stuff in the ext_weak linkage support. 
Now we're using one gross, but quite robust hack :) (previous ones
did not work, for example, when ext_weak symbol was used deep inside
constant expression in the initializer).

The proper fix of this problem will require some quite huge asmprinter
changes and that's why was postponed. This fixes PR3629 by the way :)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65230 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-21 11:53:32 +00:00
Bill Wendling
5a45d76c25 Make sure this doesn't access .end() too. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65213 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-21 01:11:36 +00:00
Bill Wendling
8aa374b629 Make sure we don't dereference the .end() of the container. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65211 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-21 01:07:26 +00:00
Bill Wendling
3d2445f5d9 Propagate more debug loc infos. This also includes some code cleaning. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65207 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-21 00:43:56 +00:00
Bill Wendling
2625f9b2e4 We need to propagate the debug location information even when dealing with the 
prologue/epilogue.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65206 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-21 00:32:08 +00:00
Evan Cheng
79fb3b434f Support return of MMX values in 64-bit mode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65152 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-20 20:43:02 +00:00
Bill Wendling
cb819f13d7 Put code that generates debug labels into TableGen so that it can be used by 
everyone.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64978 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-18 23:12:06 +00:00
Nate Begeman
d6b7a242d3 Add support to the JIT for true non-lazy operation. When a call to a function 
that has not been JIT'd yet, the callee is put on a list of pending functions
to JIT.  The call is directed through a stub, which is updated with the address
of the function after it has been JIT'd.  A new interface for allocating and
updating empty stubs is provided.

Add support for removing the ModuleProvider the JIT was created with, which
would otherwise invalidate the JIT's PassManager, which is initialized with the
ModuleProvider's Module.

Add support under a new ExecutionEngine flag for emitting the infomration 
necessary to update Function and GlobalVariable stubs after JITing them, by
recording the address of the stub and the name of the GlobalValue.  This allows
code to be copied from one address space to another, where libraries may live
at different virtual addresses, and have the stubs updated with their new
correct target addresses.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64906 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-18 08:31:02 +00:00
Dan Gohman
97357614b5 Factor out the code to add a MachineOperand to a MachineInstrBuilder. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64891 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-18 05:45:50 +00:00
Evan Cheng
caa0c2cadd GV with null value initializer shouldn't go to BSS if it's meant for a mergeable strings section. Currently it only checks for Darwin. Someone else please check if it should apply to other targets as well. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64877 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-18 02:19:52 +00:00
Scott Michel
fdc40a0a69 Remove trailing whitespace to reduce later commit patch noise. 
(Note: Eventually, commits like this will be handled via a pre-commit hook that
 does this automagically, as well as expand tabs to spaces and look for 80-col
 violations.)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64827 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-17 22:15:04 +00:00
Chris Lattner
a66878b881 add a horrible note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64719 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-17 01:16:14 +00:00
Bill Wendling
86e6cb924b --- Merging (from foreign repository) r64714 into '.': 
U    include/llvm/CodeGen/DebugLoc.h
U    lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
U    lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
U    lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp

Enable debug location generation at -Os. This goes with the reapplication of the
r63639 patch.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64715 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-17 01:04:54 +00:00
Dan Gohman
35188eb54d MachineLICM now handles these cases. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64620 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-15 23:24:52 +00:00
Dan Gohman
b5aa3ad1e7 The x86-64 red zone is now being used. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64535 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-14 03:30:05 +00:00
Evan Cheng
c7ce29b04f Teach x86 target -soft-float. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64496 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-13 22:36:38 +00:00
Dale Johannesen
8d13f8f104 Remove non-DebugLoc versions of BuildMI from X86. 
There were some that might even matter in X86FastISel.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64437 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-13 02:33:27 +00:00
Bill Wendling
92c1e12647 Revert this. It was breaking stuff. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64428 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-13 02:16:35 +00:00
Bill Wendling
54fc7d6714 Turn off the old way of handling debug information in the code generator. Use 
the new way, where all of the information is passed on SDNodes and machine
instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64427 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-13 02:01:04 +00:00
Dale Johannesen
21b5541814 Eliminate a couple of non-DebugLoc BuildMI variants. 
Modify callers.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64409 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-12 23:08:38 +00:00
Dale Johannesen
78e3e521cd Arrange to print constants that match "n" and "i" constraints 
in inline asm as signed (what gcc does).  Add partial support
for x86-specific "e" and "Z" constraints, with appropriate
signedness for printing.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64400 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-12 20:58:09 +00:00
Chris Lattner
1823c92aa7 fix the X86 backend to just drop llvm.declare nodes for VLAs instead of 
leaving them in the DAG and then getting selection errors.  This is a 
fix for PR3538.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64382 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-12 17:33:11 +00:00
Bill Wendling
fbef3101a5 Propagate DebugLoc info for spiller call-backs. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64329 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-11 21:51:19 +00:00
Dan Gohman
d293e0d2dc Don't try to set an EFLAGS operand to dead if no instruction was created. 
This fixes a bug introduced by r61215.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64316 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-11 19:50:24 +00:00
Evan Cheng
1d76864df3 Handle llvm.x86.sse2.maskmov.dqu in 64-bit. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64240 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-10 22:06:28 +00:00
Evan Cheng
7403eeaa88 80 col violations. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64237 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-10 21:39:44 +00:00
Evan Cheng
a0eedac226 Implement FpSET_ST1_*. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64186 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-09 23:32:07 +00:00
Dan Gohman
333014e256 Use doxygen comment syntax. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64150 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-09 18:12:09 +00:00
Evan Cheng
dc54d317e7 Turns out AnalyzeBranch can modify the mbb being analyzed. This is a nasty 
suprise to some callers, e.g. register coalescer. For now, add an parameter
that tells AnalyzeBranch whether it's safe to modify the mbb. A better
solution is out there, but I don't have time to deal with it right now.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64124 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-09 07:14:22 +00:00
Chris Lattner
be685cc72a add a note. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64093 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-08 20:44:19 +00:00
Dale Johannesen
6f38cb61a9 Use getDebugLoc forwarder instead of getNode()->getDebugLoc. 
No functional change.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64026 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-07 19:59:05 +00:00
Dan Gohman
1fdbc1dd4e Constify TargetInstrInfo::EmitInstrWithCustomInserter, allowing 
ScheduleDAG's TLI member to use const.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64018 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-07 16:15:20 +00:00
Dale Johannesen
b300d2aa3e Get rid of the last non-DebugLoc versions of getNode! 
Many targets build placeholder nodes for special operands, e.g.
GlobalBaseReg on X86 and PPC for the PIC base.  There's no
sensible way to associate debug info with these.  I've left
them built with getNode calls with explicit DebugLoc::getUnknownLoc operands. 
I'm not too happy about this but don't see a good improvement;
I considered adding a getPseudoOperand or something, but it
seems to me that'll just make it harder to read.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63992 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-07 00:55:49 +00:00